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llvm-project/llvm/lib/Target/RISCV
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Fangrui Song 6d2d589b06 [MC] De-capitalize another set of MCStreamer::Emit* functions 
Emit{ValueTo,Code}Alignment Emit{DTP,TP,GP}* EmitSymbolValue etc
2020-02-14 19:26:52 -08:00
..
AsmParser
[MC] De-capitalize another set of MCStreamer::Emit* functions
2020-02-14 19:26:52 -08:00
Disassembler
CMake: Make most target symbols hidden by default
2020-01-14 19:46:52 -08:00
MCTargetDesc
[NFC][RISCV] Fixing typo in comment.
2020-02-05 11:30:11 -08:00
TargetInfo
CMake: Make most target symbols hidden by default
2020-01-14 19:46:52 -08:00
Utils
[RISCV] Support ABI checking with per function target-features
2020-01-22 08:12:28 -08:00
CMakeLists.txt
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LLVMBuild.txt
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RISCV.h
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RISCV.td
[RISCV] Add support for save/restore of callee-saved registers via libcalls
2020-02-11 21:23:03 +00:00
RISCVAsmPrinter.cpp
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
2020-02-13 22:08:55 -08:00
RISCVCallingConv.td
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RISCVCallLowering.cpp
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RISCVCallLowering.h
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RISCVExpandPseudoInsts.cpp
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RISCVFrameLowering.cpp
[RISCV] Add support for save/restore of callee-saved registers via libcalls
2020-02-11 21:23:03 +00:00
RISCVFrameLowering.h
[RISCV] Add support for save/restore of callee-saved registers via libcalls
2020-02-11 21:23:03 +00:00
RISCVInstrFormats.td
[RISCV] Scheduler description for the Rocket core
2020-01-23 19:36:47 -06:00
RISCVInstrFormatsC.td
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RISCVInstrInfo.cpp
[NFC] unsigned->Register in storeRegTo/loadRegFromStack
2020-02-03 14:22:16 +01:00
RISCVInstrInfo.h
[NFC] unsigned->Register in storeRegTo/loadRegFromStack
2020-02-03 14:22:16 +01:00
RISCVInstrInfo.td
[RISCV] Optimize seteq/setne pattern expansions for better code size
2020-02-11 22:45:15 +08:00
RISCVInstrInfoA.td
[RISCV] Scheduler description for the Rocket core
2020-01-23 19:36:47 -06:00
RISCVInstrInfoC.td
[RISCV] Scheduler description for the Rocket core
2020-01-23 19:36:47 -06:00
RISCVInstrInfoD.td
[RISCV] Scheduler description for the Rocket core
2020-01-23 19:36:47 -06:00
RISCVInstrInfoF.td
[RISCV] Scheduler description for the Rocket core
2020-01-23 19:36:47 -06:00
RISCVInstrInfoM.td
[RISCV] Scheduler description for the Rocket core
2020-01-23 19:36:47 -06:00
RISCVInstructionSelector.cpp
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RISCVISelDAGToDAG.cpp
[SelectionDAG] Disallow indirect "i" constraint
2019-12-29 16:50:42 -08:00
RISCVISelLowering.cpp
[LegalizeTypes][ARM][AArch64][PowerPC][RISCV][X86] Use BUILD_PAIR to return expanded integer results from ReplaceNodeResults instead of just returning two results.
2020-02-08 09:52:31 -08:00
RISCVISelLowering.h
CodeGen: Use LLT instead of EVT in getRegisterByName
2020-01-09 17:37:52 -05:00
RISCVLegalizerInfo.cpp
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RISCVLegalizerInfo.h
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RISCVMachineFunctionInfo.h
[RISCV] Add support for save/restore of callee-saved registers via libcalls
2020-02-11 21:23:03 +00:00
RISCVMCInstLower.cpp
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RISCVMergeBaseOffset.cpp
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RISCVRegisterBankInfo.cpp
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RISCVRegisterBankInfo.h
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RISCVRegisterBanks.td
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RISCVRegisterInfo.cpp
[RISCV] Correct the CallPreservedMask for the function call in an interrupt handler
2020-02-15 09:14:04 +08:00
RISCVRegisterInfo.h
[RISCV] Add support for save/restore of callee-saved registers via libcalls
2020-02-11 21:23:03 +00:00
RISCVRegisterInfo.td
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RISCVSchedRocket32.td
[RISCV] Scheduler description for the Rocket core
2020-01-23 19:36:47 -06:00
RISCVSchedRocket64.td
[RISCV] Scheduler description for the Rocket core
2020-01-23 19:36:47 -06:00
RISCVSchedule.td
[RISCV] Scheduler description for the Rocket core
2020-01-23 19:36:47 -06:00
RISCVSubtarget.cpp
Make llvm::StringRef to std::string conversions explicit.
2020-01-28 23:25:25 +01:00
RISCVSubtarget.h
[RISCV] Add support for save/restore of callee-saved registers via libcalls
2020-02-11 21:23:03 +00:00
RISCVSystemOperands.td
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RISCVTargetMachine.cpp
[RISCV] Check the target-abi module flag matches the option
2020-01-21 07:32:12 -08:00
RISCVTargetMachine.h
[RISCV] Add subtargets initialized with target feature
2019-12-17 09:34:01 -08:00
RISCVTargetObjectFile.cpp
Revert "Honor -fuse-init-array when os is not specified on x86"
2019-12-17 07:36:59 -08:00
RISCVTargetObjectFile.h
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RISCVTargetTransformInfo.cpp
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RISCVTargetTransformInfo.h
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