Stanislav Mekhanoshin 29976f2e58

[AMDGPU] Handle S_GETREG_B32 hazard on gfx1250 (#153848) ...

GFX1250 SPG says: S_GETREG_B32 does not wait for idle before executing.
The user must S_WAIT_ALU 0 before S_GETREG_B32 on:
STATUS, STATE_PRIV, EXCP_FLAG_PRIV, or EXCP_FLAG_USER.

2025-08-15 11:38:22 -07:00

..

AArch64

[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)

2025-08-15 15:45:33 +01:00

AMDGPU

[AMDGPU] Handle S_GETREG_B32 hazard on gfx1250 (#153848)

2025-08-15 11:38:22 -07:00

ARC

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ARM

[ARM] Protect against odd sized vectors in isVTRNMask and friends (#153413)

2025-08-13 20:57:46 +01:00

AVR

[Test] Add and update tests for lrint/llrint (NFC) (#152662)

2025-08-12 09:56:51 +09:00

BPF

[IR] Remove size argument from lifetime intrinsics (#150248)

2025-08-08 11:09:34 +02:00

CSKY

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DirectX

[DirectX] Add GlobalDCE pass after finalize linkage pass in DirectX backend (#151071)

2025-08-15 10:45:34 -07:00

Generic

[Arm64EC] Add support for half (#152843)

2025-08-12 14:15:52 -07:00

Hexagon

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

Inputs

CodeGen: Convert test to opaque pointers (#147886)

2025-07-10 17:01:19 +09:00

Lanai

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LoongArch

[LoongArch] Optimize inserting extracted element for v4i64/v8i32 (#152629)

2025-08-14 17:06:50 +08:00

M68k

[M68k] Fix incorrect boolean content type (#152572)

2025-08-12 08:46:41 -07:00

Mips

[Mips] Add frexpl and sincosl to f128 libcall list

2025-08-15 12:45:05 +02:00

MIR

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

MLRegAlloc

[mlgo] Fix test post - #147716 (#148259)

2025-07-12 12:24:01 +02:00

MSP430

[Test] Add and update tests for lrint/llrint (NFC) (#152662)

2025-08-12 09:56:51 +09:00

NVPTX

[NVPTX] Do not mark move of global address as cheap enabling more CSE (#153730)

2025-08-15 10:17:34 -07:00

PowerPC

[llvm][LICM] Limit multi-use BOAssociation to FP and Vector (#149829)

2025-08-14 11:56:55 +01:00

RISCV

[IA][RISCV] Detecting gap mask from a mask assembled by interleaveN intrinsics (#153510)

2025-08-15 09:22:47 -07:00

SPARC

[SPARC] Use FMA instructions when we have UA2007 (#148434)

2025-08-12 22:46:00 +07:00

SPIRV

[SPIRV] Create a new OpSelect selector and fix register types. (#152311)

2025-08-12 17:43:30 -04:00

SystemZ

[SystemZ] Allow forming overflow op for i128 (#153557)

2025-08-14 16:15:22 +02:00

Thumb

[ARM] Have custom lowering for ucmp and scmp (#149315)

2025-08-08 06:51:18 +01:00

Thumb2

[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)

2025-08-13 10:41:44 +08:00

VE

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

WebAssembly

Revert "[WebAssembly] Combine i128 to v16i8 for setcc & expand memcmp for 16 byte loads with simd128" (#153360)

2025-08-13 07:41:44 +00:00

WinCFGuard

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WinEH

Fix Windows EH IP2State tables (remove +1 bias) (#144745)

2025-07-22 09:18:13 -07:00

X86

[win][x64] Allow push/pop for stack alloc when unwind v2 is required (#153621)

2025-08-15 09:03:44 -07:00

XCore

XCore: Fix broken check lines in test

2025-08-04 08:40:48 +09:00

Xtensa

[Xtensa] Add esp32/esp8266 cpus implementation. (#152409)

2025-08-12 15:17:36 +03:00