Nikita Popov 2cb5241c77 Revert "[AMDGPU][True16][CodeGen] FLAT_load using D16 pseudo instruction (#114500)" ...

This reverts commit f7a5f067885b7f6cc4a000c8392adf6b777a9108.

Fails to build with:

llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp:126:37: error: no member named 'OPERAND_LAST' in 'llvm::AMDGPU::OpName'
  126 |   uint16_t OpName = AMDGPU::OpName::OPERAND_LAST;

2025-02-18 17:16:12 +01:00

..

AArch64

[SelectionDAG] Add PARTIAL_REDUCE_U/SMLA ISD Nodes (#125207)

2025-02-18 09:08:47 +00:00

AMDGPU

Revert "[AMDGPU][True16][CodeGen] FLAT_load using D16 pseudo instruction (#114500)"

2025-02-18 17:16:12 +01:00

ARC

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ARM

[IR] Remove mul constant expression (#127046)

2025-02-14 09:28:57 +01:00

AVR

PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)

2025-02-05 23:29:02 +07:00

BPF

PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)

2025-02-05 23:29:02 +07:00

CSKY

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DirectX

[HLSL] Fix Root signature test error (#127261)

2025-02-14 15:39:52 -08:00

Generic

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Hexagon

[Hexagon] Explicitly truncate constant in UAddSubO (#127360)

2025-02-17 09:30:48 -06:00

Inputs

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Lanai

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LoongArch

[LoongArch] Add test for stackmaps. NFC

2025-02-13 20:58:26 +08:00

M68k

[M68k] always use movem for register spills (#106715)

2025-01-31 19:42:40 -06:00

Mips

LLVM/Test: Mark Mips readcyclecounter.ll XFAIL: expensive_checks (#127587)

2025-02-18 17:14:29 +08:00

MIR

MachineCopyPropagation: Do not remove copies preserved by regmask (#125868)

2025-02-10 12:26:33 -05:00

MLRegAlloc

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MSP430

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NVPTX

Reland "[NVPTX] Cleanup/Refactoring in NVPTX AsmPrinter and RegisterInfo (NFC)" (#127277)

2025-02-14 18:45:14 -08:00

PowerPC

[PowerPC] Use getSignedTargetConstant in SelectOptimalAddrMode. (#127305)

2025-02-15 14:13:32 -08:00

RISCV

[RISCV] Add policy operand to masked vector compare pseudos. Remove ForceTailAgnostic. NFC (#127575)

2025-02-18 07:05:05 -08:00

SPARC

PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)

2025-02-05 23:29:02 +07:00

SPIRV

[SPIR-V] Built-in variables: mapping from an OpenCL to SPIR-V BuiltIn and SPIR-V friendly builtins for Image Read/Write instructions (#127242)

2025-02-18 12:03:37 +01:00

SystemZ

[SystemZ] Add codegen support for llvm.roundeven

2025-02-14 00:10:37 +01:00

Thumb

[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)

2025-01-23 12:49:35 -08:00

Thumb2

[ARM] Fix calling convention for __fp16 with big-endian (#126741)

2025-02-13 09:09:29 +00:00

VE

PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)

2025-02-05 23:29:02 +07:00

WebAssembly

[WebAssembly] Enable interleaved memory accesses (#125696)

2025-02-17 09:09:52 +00:00

WinCFGuard

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WinEH

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X86

[X86] canonicalizeShuffleWithOp - add handling for X86ISD::VPERMV nodes (#127625)

2025-02-18 14:42:18 +00:00

XCore

[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)

2025-02-12 09:19:00 +00:00

Xtensa

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