1c874bbbd6
Select only needs branches and moves so we don't need to promote it. Promoting would canonicalize NaNs which select shouldn't do.
314 lines
9.0 KiB
LLVM
314 lines
9.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=riscv32 -mattr=+zfbfmin -verify-machineinstrs \
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; RUN: -target-abi ilp32f < %s | FileCheck %s
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; RUN: llc -mtriple=riscv64 -mattr=+zfbfmin -verify-machineinstrs \
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; RUN: -target-abi lp64f < %s | FileCheck %s
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define bfloat @select_fcmp_false(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_false:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: ret
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%1 = fcmp false bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_oeq(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_oeq:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa0
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; CHECK-NEXT: feq.s a0, fa4, fa5
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; CHECK-NEXT: bnez a0, .LBB1_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB1_2:
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; CHECK-NEXT: ret
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%1 = fcmp oeq bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_ogt(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_ogt:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa0
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa1
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; CHECK-NEXT: flt.s a0, fa4, fa5
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; CHECK-NEXT: bnez a0, .LBB2_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB2_2:
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; CHECK-NEXT: ret
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%1 = fcmp ogt bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_oge(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_oge:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa0
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa1
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; CHECK-NEXT: fle.s a0, fa4, fa5
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; CHECK-NEXT: bnez a0, .LBB3_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB3_2:
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; CHECK-NEXT: ret
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%1 = fcmp oge bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_olt(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_olt:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa0
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; CHECK-NEXT: flt.s a0, fa4, fa5
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; CHECK-NEXT: bnez a0, .LBB4_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB4_2:
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; CHECK-NEXT: ret
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%1 = fcmp olt bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_ole(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_ole:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa0
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; CHECK-NEXT: fle.s a0, fa4, fa5
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; CHECK-NEXT: bnez a0, .LBB5_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB5_2:
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; CHECK-NEXT: ret
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%1 = fcmp ole bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_one(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_one:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa0
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; CHECK-NEXT: flt.s a0, fa4, fa5
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; CHECK-NEXT: flt.s a1, fa5, fa4
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; CHECK-NEXT: or a0, a1, a0
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; CHECK-NEXT: bnez a0, .LBB6_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB6_2:
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; CHECK-NEXT: ret
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%1 = fcmp one bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_ord(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_ord:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: feq.s a0, fa5, fa5
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa0
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; CHECK-NEXT: feq.s a1, fa5, fa5
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; CHECK-NEXT: and a0, a1, a0
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; CHECK-NEXT: bnez a0, .LBB7_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB7_2:
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; CHECK-NEXT: ret
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%1 = fcmp ord bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_ueq(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_ueq:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa0
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; CHECK-NEXT: flt.s a0, fa4, fa5
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; CHECK-NEXT: flt.s a1, fa5, fa4
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; CHECK-NEXT: or a0, a1, a0
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; CHECK-NEXT: beqz a0, .LBB8_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB8_2:
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; CHECK-NEXT: ret
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%1 = fcmp ueq bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_ugt(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_ugt:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa0
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; CHECK-NEXT: fle.s a0, fa4, fa5
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; CHECK-NEXT: beqz a0, .LBB9_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB9_2:
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; CHECK-NEXT: ret
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%1 = fcmp ugt bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_uge(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_uge:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa0
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; CHECK-NEXT: flt.s a0, fa4, fa5
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; CHECK-NEXT: beqz a0, .LBB10_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB10_2:
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; CHECK-NEXT: ret
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%1 = fcmp uge bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_ult(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_ult:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa0
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa1
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; CHECK-NEXT: fle.s a0, fa4, fa5
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; CHECK-NEXT: beqz a0, .LBB11_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB11_2:
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; CHECK-NEXT: ret
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%1 = fcmp ult bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_ule(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_ule:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa0
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa1
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; CHECK-NEXT: flt.s a0, fa4, fa5
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; CHECK-NEXT: beqz a0, .LBB12_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB12_2:
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; CHECK-NEXT: ret
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%1 = fcmp ule bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_une(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_une:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa0
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; CHECK-NEXT: feq.s a0, fa4, fa5
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; CHECK-NEXT: beqz a0, .LBB13_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB13_2:
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; CHECK-NEXT: ret
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%1 = fcmp une bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_uno(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_uno:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: feq.s a0, fa5, fa5
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa0
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; CHECK-NEXT: feq.s a1, fa5, fa5
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; CHECK-NEXT: and a0, a1, a0
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; CHECK-NEXT: beqz a0, .LBB14_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: fmv.s fa0, fa1
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; CHECK-NEXT: .LBB14_2:
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; CHECK-NEXT: ret
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%1 = fcmp uno bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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define bfloat @select_fcmp_true(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_true:
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; CHECK: # %bb.0:
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; CHECK-NEXT: ret
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%1 = fcmp true bfloat %a, %b
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%2 = select i1 %1, bfloat %a, bfloat %b
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ret bfloat %2
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}
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; Ensure that ISel succeeds for a select+fcmp that has an i32 result type.
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define i32 @i32_select_fcmp_oeq(bfloat %a, bfloat %b, i32 %c, i32 %d) nounwind {
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; CHECK-LABEL: i32_select_fcmp_oeq:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa0
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; CHECK-NEXT: feq.s a2, fa4, fa5
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; CHECK-NEXT: bnez a2, .LBB16_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: mv a0, a1
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; CHECK-NEXT: .LBB16_2:
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; CHECK-NEXT: ret
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%1 = fcmp oeq bfloat %a, %b
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%2 = select i1 %1, i32 %c, i32 %d
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ret i32 %2
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}
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define i32 @select_fcmp_oeq_1_2(bfloat %a, bfloat %b) {
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; CHECK-LABEL: select_fcmp_oeq_1_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa0
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; CHECK-NEXT: feq.s a0, fa4, fa5
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; CHECK-NEXT: li a1, 2
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; CHECK-NEXT: sub a0, a1, a0
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; CHECK-NEXT: ret
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%1 = fcmp fast oeq bfloat %a, %b
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%2 = select i1 %1, i32 1, i32 2
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ret i32 %2
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}
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define signext i32 @select_fcmp_uge_negone_zero(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_uge_negone_zero:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa0
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; CHECK-NEXT: fle.s a0, fa4, fa5
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; CHECK-NEXT: addi a0, a0, -1
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; CHECK-NEXT: ret
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%1 = fcmp ugt bfloat %a, %b
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%2 = select i1 %1, i32 -1, i32 0
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ret i32 %2
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}
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define signext i32 @select_fcmp_uge_1_2(bfloat %a, bfloat %b) nounwind {
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; CHECK-LABEL: select_fcmp_uge_1_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fcvt.s.bf16 fa5, fa1
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; CHECK-NEXT: fcvt.s.bf16 fa4, fa0
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; CHECK-NEXT: fle.s a0, fa4, fa5
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; CHECK-NEXT: addi a0, a0, 1
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; CHECK-NEXT: ret
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%1 = fcmp ugt bfloat %a, %b
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%2 = select i1 %1, i32 1, i32 2
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ret i32 %2
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}
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