Chinmay Deshpande 40d5a7d69e

[AMDGPU][UniformityAnalysis] Mark set_inactive and set_inactive_chain_arg as SourceOfDivergence (#190640) ...

`set_inactive` produces a result that varies per-lane based on the EXEC mask, even when both inputs are uniform.

2026-04-06 12:40:22 -07:00

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AArch64

[DAG] computeKnownFPClass - add ISD::SPLAT_VECTOR handling (#189780)

2026-04-04 14:54:12 +00:00

AMDGPU

[AMDGPU][UniformityAnalysis] Mark set_inactive and set_inactive_chain_arg as SourceOfDivergence (#190640)

2026-04-06 12:40:22 -07:00

ARC

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ARM

[ARM] Enable creation of ARMISD::CMN nodes (#163223)

2026-04-06 20:05:14 +02:00

AVR

[AVR] Improve expansion of pseudo instruction SPREAD (#186780)

2026-03-16 21:24:20 +01:00

BPF

Move ExpandMemCmp and MergeIcmp to the middle end (#77370)

2026-04-02 09:57:00 +02:00

CSKY

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DirectX

[HLSL][DirectX][SPIRV] Implement the fma API (#185304)

2026-03-27 14:12:48 -04:00

Generic

[CodeGen] Move llc-start-stop.ll test to X86 (#190151)

2026-04-02 13:04:29 +02:00

Hexagon

[Hexagon] Use trap0(#0xDB) for debugtrap instead of brkpt (#189446)

2026-04-03 15:12:49 -05:00

Inputs

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Lanai

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LoongArch

Move ExpandMemCmp and MergeIcmp to the middle end (#77370)

2026-04-02 09:57:00 +02:00

M68k

Move ExpandMemCmp and MergeIcmp to the middle end (#77370)

2026-04-02 09:57:00 +02:00

Mips

[Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (#178942)

2026-03-22 23:48:00 -04:00

MIR

Reland "[GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (#155107)" (#188502)

2026-04-04 05:57:13 -07:00

MIR2Vec

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MLRegAlloc

[MLGO] Update regalloc tests after c245d764b8bd70ff78044f56b2dea619b0… (#190025)

2026-04-01 20:06:58 +00:00

MSP430

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NVPTX

[NVPTX] Fix missing arch version for ptxas in LIT test. (#190231)

2026-04-02 13:02:29 -07:00

PowerPC

Move ExpandMemCmp and MergeIcmp to the middle end (#77370)

2026-04-02 09:57:00 +02:00

RISCV

[RISCV] Use EVT instead of MVT in compressShuffleOfShuffles. (#190636)

2026-04-06 11:03:38 -07:00

SPARC

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SPIRV

[SPIR-V] Emit builtin variable OpVariable into entry block (#189958)

2026-04-03 13:18:48 +02:00

SystemZ

[X86][DAG] remove LowerFCanonicalize (#188127)

2026-04-01 13:34:05 +00:00

Thumb

[ARM] Try to lower sign bit SELECT_CC to shift (#186349)

2026-03-16 09:32:43 +01:00

Thumb2

[CodeGen] Do not remove IMPLICIT_DEF unless all uses have undef flag added (#188133)

2026-04-01 10:11:42 -05:00

VE

[LegalizeTypes] Keep non-negative info in SUB(CTLZ) (#186338)

2026-03-24 09:17:17 +01:00

WebAssembly

Move ExpandMemCmp and MergeIcmp to the middle end (#77370)

2026-04-02 09:57:00 +02:00

WinCFGuard

[CFGuard] Consider function aliases as indirect call targets (#188223)

2026-03-24 18:55:46 +01:00

WinEH

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X86

[DAG] isKnownToBeAPowerOfTwo - add missing DemandedElts handling to ISD::TRUNCATE and hidden m_Neg pattern (#190190)

2026-04-03 12:03:33 +00:00

XCore

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Xtensa

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