llvm-project

History

[DAG] SimplifyDemandedBits - use ComputeKnownBits instead of getValidShiftAmountConstant to check for constant shift amounts. (#92412 )

This allows us to handle cases where the constant has already been type legalized behind a bitcast

Despite calling ComputeKnownBits I'm not seeing any notable change in compile time.

2024-05-16 17:04:30 +01:00

CMakeLists.txt

…

DAGCombiner.cpp

[DAGCombiner] Mark vectors as not AllAddOne/AllSubOne on type mismatch (#92195 )

2024-05-15 12:39:28 -07:00

FastISel.cpp

LLVM_FALLTHROUGH => [[fallthrough]]. NFC

2024-04-25 17:50:59 -07:00

FunctionLoweringInfo.cpp

[RemoveDIs][NFC] Rename DPValue -> DbgVariableRecord (#85216 )

2024-03-19 20:07:07 +00:00

InstrEmitter.cpp

[CodeGen] Make the parameter TRI required in some functions. (#85968 )

2024-04-24 14:24:14 +01:00

InstrEmitter.h

…

LegalizeDAG.cpp

[VP][RISCV] Add vp.reduce.fmaximum/fminimum and its RISC-V codegen (#91782 )

2024-05-10 16:01:47 -07:00

LegalizeFloatTypes.cpp

AMDGPU: Don't bitcast float typed atomic store in IR (#90116 )

2024-05-07 21:43:22 +02:00

LegalizeIntegerTypes.cpp

[VP][RISCV] Add vp.cttz.elts intrinsic and its RISC-V codegen (#90502 )

2024-04-30 09:27:10 -07:00

LegalizeTypes.cpp

[SelectionDAG] Adjust placement of blank lines in debug output. NFC (#70969 )

2023-11-02 09:35:04 -07:00

LegalizeTypes.h

AMDGPU: Don't bitcast float typed atomic store in IR (#90116 )

2024-05-07 21:43:22 +02:00

LegalizeTypesGeneric.cpp

[llvm][TypeSize] Fix addition/subtraction in TypeSize. (#72979 )

2023-11-22 08:52:53 +00:00

LegalizeVectorOps.cpp

[LegalizeVectorOps][X86] Add ISD::ABDS/ABSDU to the list of opcodes handled by LegalizeVectorOps. (#92332 )

2024-05-15 21:46:31 -07:00

LegalizeVectorTypes.cpp

[VP][RISCV] Add vp.reduce.fmaximum/fminimum and its RISC-V codegen (#91782 )

2024-05-10 16:01:47 -07:00

MatchContext.h

[RISCV][VP] Introduce vp saturating addition/subtraction and RISC-V support. (#82370 )

2024-02-23 14:17:15 +08:00

ResourcePriorityQueue.cpp

…

ScheduleDAGFast.cpp

[llvm][NFC] Use SDValue::getConstantOperandVal(i) where possible (#76708 )

2024-01-02 13:14:28 +00:00

ScheduleDAGRRList.cpp

[llvm] Move CodeGenTypes library to its own directory (#79444 )

2024-01-25 12:01:31 -05:00

ScheduleDAGSDNodes.cpp

[IR] Memory Model Relaxation Annotations (#78569 )

2024-04-24 08:52:25 +02:00

ScheduleDAGSDNodes.h

[llvm] Move CodeGenTypes library to its own directory (#79444 )

2024-01-25 12:01:31 -05:00

ScheduleDAGVLIW.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

SDNodeDbgValue.h

…

SelectionDAG.cpp

[AArch64] Add an all-in-one histogram intrinsic

2024-05-13 11:35:28 +01:00

SelectionDAGAddressAnalysis.cpp

[CodeGen] Update for scalable MemoryType in MMO (#70452 )

2024-03-23 12:56:25 +00:00

SelectionDAGBuilder.cpp

[AArch64] Add an all-in-one histogram intrinsic

2024-05-13 11:35:28 +01:00

SelectionDAGBuilder.h

[AArch64] Add an all-in-one histogram intrinsic

2024-05-13 11:35:28 +01:00

SelectionDAGDumper.cpp

[AArch64] Add an all-in-one histogram intrinsic

2024-05-13 11:35:28 +01:00

SelectionDAGISel.cpp

[IR] Memory Model Relaxation Annotations (#78569 )

2024-04-24 08:52:25 +02:00

SelectionDAGPrinter.cpp

…

SelectionDAGTargetInfo.cpp

…

StatepointLowering.cpp

[StatepointLowering] Use Constant instead of TargetConstant for undef value (#81635 )

2024-02-13 21:58:01 +03:00

StatepointLowering.h

…

TargetLowering.cpp

[DAG] SimplifyDemandedBits - use ComputeKnownBits instead of getValidShiftAmountConstant to check for constant shift amounts. (#92412 )

2024-05-16 17:04:30 +01:00