19a004b468
Follow up to the series: 1. https://reviews.llvm.org/D140161 2. https://reviews.llvm.org/D140349 3. https://reviews.llvm.org/D140331 4. https://reviews.llvm.org/D140323 Completes the work from the previous two for remaining targets. This creates the following named passes that can be run via `llc -{start|stop}-{before|after}`: - arc-isel - arm-isel - avr-isel - bpf-isel - csky-isel - hexagon-isel - lanai-isel - loongarch-isel - m68k-isel - msp430-isel - mips-isel - nvptx-isel - ppc-codegen - riscv-isel - sparc-isel - systemz-isel - ve-isel - wasm-isel - xcore-isel A nice way to write tests for SelectionDAGISel might be to use a RUN: line like: llc -mtriple=<triple> -start-before=<arch>-isel -stop-after=finalize-isel -o - Fixes: https://github.com/llvm/llvm-project/issues/59538 Reviewed By: asb, zixuan-wu Differential Revision: https://reviews.llvm.org/D140364
100 lines
3.0 KiB
C++
100 lines
3.0 KiB
C++
//===-- AVR.h - Top-level interface for AVR representation ------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// AVR back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_AVR_H
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#define LLVM_AVR_H
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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#include "llvm/Pass.h"
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#include "llvm/PassRegistry.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class AVRTargetMachine;
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class FunctionPass;
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class PassRegistry;
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Pass *createAVRShiftExpandPass();
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FunctionPass *createAVRISelDag(AVRTargetMachine &TM,
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CodeGenOpt::Level OptLevel);
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FunctionPass *createAVRExpandPseudoPass();
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FunctionPass *createAVRFrameAnalyzerPass();
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FunctionPass *createAVRBranchSelectionPass();
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void initializeAVRDAGToDAGISelPass(PassRegistry &);
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void initializeAVRExpandPseudoPass(PassRegistry &);
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void initializeAVRShiftExpandPass(PassRegistry &);
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/// Contains the AVR backend.
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namespace AVR {
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/// An integer that identifies all of the supported AVR address spaces.
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enum AddressSpace {
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DataMemory,
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ProgramMemory,
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ProgramMemory1,
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ProgramMemory2,
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ProgramMemory3,
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ProgramMemory4,
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ProgramMemory5,
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NumAddrSpaces,
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};
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/// Checks if a given type is a pointer to program memory.
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template <typename T> bool isProgramMemoryAddress(T *V) {
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auto *PT = cast<PointerType>(V->getType());
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assert(PT != nullptr && "unexpected MemSDNode");
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return PT->getAddressSpace() == ProgramMemory ||
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PT->getAddressSpace() == ProgramMemory1 ||
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PT->getAddressSpace() == ProgramMemory2 ||
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PT->getAddressSpace() == ProgramMemory3 ||
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PT->getAddressSpace() == ProgramMemory4 ||
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PT->getAddressSpace() == ProgramMemory5;
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}
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template <typename T> AddressSpace getAddressSpace(T *V) {
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auto *PT = cast<PointerType>(V->getType());
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assert(PT != nullptr && "unexpected MemSDNode");
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unsigned AS = PT->getAddressSpace();
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if (AS < NumAddrSpaces)
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return static_cast<AddressSpace>(AS);
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return NumAddrSpaces;
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}
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inline bool isProgramMemoryAccess(MemSDNode const *N) {
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auto *V = N->getMemOperand()->getValue();
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if (V != nullptr && isProgramMemoryAddress(V))
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return true;
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return false;
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}
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// Get the index of the program memory bank.
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// -1: not program memory
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// 0: ordinary program memory
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// 1~5: extended program memory
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inline int getProgramMemoryBank(MemSDNode const *N) {
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auto *V = N->getMemOperand()->getValue();
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if (V == nullptr || !isProgramMemoryAddress(V))
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return -1;
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AddressSpace AS = getAddressSpace(V);
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assert(ProgramMemory <= AS && AS <= ProgramMemory5);
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return static_cast<int>(AS - ProgramMemory);
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}
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} // end of namespace AVR
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} // end namespace llvm
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#endif // LLVM_AVR_H
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