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llvm-project/llvm/lib/Target/AVR
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Ben Shi 2a528760bf [AVR] Fix an issue of writing 16-bit ports 
For 16-bit ports, the normal devices reqiure writing high byte first
and then low byte. But the XMEGA devices require the reverse order.

Fixes https://github.com/llvm/llvm-project/issues/58395

Reviewed By: aykevl, jacquesguan

Differential Revision: https://reviews.llvm.org/D141752
2023-04-17 15:35:33 +08:00
..
AsmParser
[CMake] Reorder and reformat deps
2023-04-17 00:32:16 +09:00
Disassembler
[CMake] Reorder and reformat deps
2023-04-17 00:32:16 +09:00
MCTargetDesc
[AVR] Reject invalid LDD instruction with explicit error
2023-04-10 10:34:45 +08:00
TargetInfo
…
AVR.h
[llvm][SelectionDAGISel] support -{start|stop}-{before|after}= for remaining targets
2022-12-21 13:25:15 -08:00
AVR.td
…
AVRAsmPrinter.cpp
[AVR][NFC] Refactor 'AVRAsmPrinter::PrintAsmOperand'
2023-01-31 11:24:34 +08:00
AVRCallingConv.td
…
AVRDevices.td
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
AVRExpandPseudoInsts.cpp
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
AVRFrameLowering.cpp
[AVR] Fix incorrect flags of livein registers when spilling them
2023-02-28 11:08:54 +08:00
AVRFrameLowering.h
…
AVRInstrFormats.td
[AVR] Fix incorrect decoding of conditional branch instructions
2023-01-29 16:28:42 +08:00
AVRInstrInfo.cpp
[CodeGen] Additional Register argument to storeRegToStackSlot/loadRegFromStackSlot
2022-12-17 11:55:34 +05:30
AVRInstrInfo.h
[CodeGen] Additional Register argument to storeRegToStackSlot/loadRegFromStackSlot
2022-12-17 11:55:34 +05:30
AVRInstrInfo.td
[AVR] Fix incorrect expansion of pseudo instructions LPMWRdZ/ELPMWRdZ
2023-04-06 15:27:04 +08:00
AVRISelDAGToDAG.cpp
[Targets] Rename Flag->Glue. NFC
2023-04-02 19:28:51 -07:00
AVRISelLowering.cpp
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
AVRISelLowering.h
[Targets] Rename Flag->Glue. NFC
2023-04-02 19:28:51 -07:00
AVRMachineFunctionInfo.h
CodeGen: Don't lazily construct MachineFunctionInfo
2022-12-21 10:49:32 -05:00
AVRMCInstLower.cpp
[AVR] Emit 'eicall' for devices with large program memory
2023-01-23 09:06:10 +08:00
AVRMCInstLower.h
[AVR] Emit 'eicall' for devices with large program memory
2023-01-23 09:06:10 +08:00
AVRRegisterInfo.cpp
[AVR] Do not emit instructions invalid for attiny10
2022-12-22 17:04:53 +01:00
AVRRegisterInfo.h
…
AVRRegisterInfo.td
…
AVRSelectionDAGInfo.h
…
AVRShiftExpand.cpp
…
AVRSubtarget.cpp
[NFC][AVR] Use inline field initializers
2023-01-10 17:48:37 -08:00
AVRSubtarget.h
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
AVRTargetMachine.cpp
Remove no longer needed includes of LegacyPassManager.h
2023-02-06 13:38:57 +01:00
AVRTargetMachine.h
[AVR] Support most address space casts
2023-01-24 18:41:14 +01:00
AVRTargetObjectFile.cpp
…
AVRTargetObjectFile.h
…
CMakeLists.txt
[CMake] Reorder and reformat deps
2023-04-17 00:32:16 +09:00
README.md
…
TODO.md
…

README.md

AVR backend

This experimental backend is for the 8-bit Atmel AVR microcontroller.

Useful links