shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/llvm/lib/Target/RISCV/MCTargetDesc
History
Jessica Clarke 3149ec07c0 [RISCV] Enable MCCodeEmitter instruction predicate verifier 
This ensures that we never encode an instruction which is unavailable,
such as if we explicitly insert a forbidden instruction when lowering.
This is particularly important on RISC-V given its high degree of
modularity, and will become increasingly important as new standard
extensions appear.

Reviewed By: asb, lenary

Differential Revision: https://reviews.llvm.org/D85015
2020-08-20 18:36:54 +01:00
..
CMakeLists.txt
…
LLVMBuild.txt
…
RISCVAsmBackend.cpp
[MC][Bugfix] Remove redundant parameter for relaxInstruction
2020-04-21 11:06:55 +08:00
RISCVAsmBackend.h
[MC][Bugfix] Remove redundant parameter for relaxInstruction
2020-04-21 11:06:55 +08:00
RISCVELFObjectWriter.cpp
[MC][RISCV] Make .reloc support arbitrary relocation types
2020-04-10 10:43:53 -07:00
RISCVELFStreamer.cpp
[RISCV][AsmParser] Implement .option (no)pic
2020-04-17 12:08:30 +00:00
RISCVELFStreamer.h
[RISCV][AsmParser] Implement .option (no)pic
2020-04-17 12:08:30 +00:00
RISCVFixupKinds.h
…
RISCVInstPrinter.cpp
Upgrade MC to v0.9.
2020-08-01 07:42:06 +08:00
RISCVInstPrinter.h
[RISCV] Assemble/Disassemble v-ext instructions.
2020-06-28 00:54:07 +08:00
RISCVMCAsmInfo.cpp
[MC][RISCV] Set UseIntegratedAssembler to true
2020-07-12 21:04:48 -07:00
RISCVMCAsmInfo.h
…
RISCVMCCodeEmitter.cpp
[RISCV] Enable MCCodeEmitter instruction predicate verifier
2020-08-20 18:36:54 +01:00
RISCVMCExpr.cpp
[RISCV] Fix evaluating %pcrel_lo against global and weak symbols
2020-01-23 02:05:48 +00:00
RISCVMCExpr.h
[RISCV] Remove unused forward declarations. NFC.
2020-04-23 16:30:45 +01:00
RISCVMCTargetDesc.cpp
[X86][MC][Target] Initial backend support a tune CPU to support -mtune
2020-08-14 15:31:50 -07:00
RISCVMCTargetDesc.h
[RISCV] Remove unused forward declarations. NFC.
2020-04-23 16:30:45 +01:00
RISCVTargetStreamer.cpp
[RISCV] Register null target streamer for RISC-V
2020-05-22 09:18:23 -07:00
RISCVTargetStreamer.h
[RISCV] Register null target streamer for RISC-V
2020-05-22 09:18:23 -07:00