llvm-project

History

Revert "[RISCV] Support RISCV BitInt larger than 128 (#175515 )" (#178311 )

This reverts commit e3156c531da5aa4ec604605ed4e19638879d773c.

We need to resolve a crash on trunk and LLVM 22. Reverting makes it
easier to backport.

Fixes #176637.

2026-01-29 07:16:14 -08:00

andes-intrinsics

[RISCV] Implement intrinsics for XAndesVSIntLoad (#147767 )

2025-07-10 09:11:29 +08:00

ntlh-intrinsics

…

rvb-intrinsics

[RISCV] Replace riscv.clmul intrinsic with llvm.clmul (#178092 )

2026-01-26 21:12:48 -08:00

rvk-intrinsics

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rvv-intrinsics-autogenerated

[RISCV] Move the intrinsic tests for zvfofp8min to zvfofp8min directory. NFC. (#176100 )

2026-01-16 13:21:45 +08:00

rvv-intrinsics-handcrafted

[RISCV] Make "target-feature +i" explicit (#157835 )

2025-09-11 08:49:06 +02:00

rvv-intrinsics-sifive

[RISCV] Move the intrinsic tests for zvfofp8min to zvfofp8min directory. NFC. (#176100 )

2026-01-16 13:21:45 +08:00

sifive-intrinsics

[RISCV] Move intrinsic tests for Xsfvcp to sifive-intrinsics sub-directory. NFC.

2025-07-14 13:08:40 +08:00

__fp16-convert.c

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abi-empty-structs.c

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attr-hw-shadow-stack.c

[Clang][RISCV] Loosen the requirement of -fcf-protection=return to zimop (#152252 )

2025-09-09 22:49:40 +08:00

attr-riscv-rvv-vector-bits-less-8-call.c

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attr-riscv-rvv-vector-bits-less-8-cast.c

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attr-rvv-vector-bits-bitcast-less-8.c

[clang][CodeGen] Emit llvm.tbaa.errno metadata during module creation

2025-10-21 11:38:45 +02:00

attr-rvv-vector-bits-bitcast.c

[clang][CodeGen] Emit llvm.tbaa.errno metadata during module creation

2025-10-21 11:38:45 +02:00

attr-rvv-vector-bits-call.c

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attr-rvv-vector-bits-cast.c

[IR] Make dead_on_return attribute optionally sized

2026-01-21 08:22:05 -08:00

attr-rvv-vector-bits-codegen.c

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attr-rvv-vector-bits-globals.c

[clang][CodeGen] Emit llvm.tbaa.errno metadata during module creation

2025-10-21 11:38:45 +02:00

attr-rvv-vector-bits-types.c

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bfloat-abi.c

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bfloat-mangle.cpp

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bitint.c

Revert "[RISCV] Support RISCV BitInt larger than 128 (#175515 )" (#178311 )

2026-01-29 07:16:14 -08:00

builtin-cpu-is-error.c

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builtin-cpu-is.c

[RISCV] Add MVendorID, MArchID, and MImpID for sifive-p550. (#159465 )

2025-09-18 07:16:51 -07:00

builtins-riscv-mips.c

RISC-V: builtins support for MIPS RV64 P8700 execution control .

2025-09-19 15:10:28 +05:30

Float16-arith.c

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fpconstrained.c

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issue-129995.cpp

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math-builtins.c

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riscv32-abi.c

[IR] Make dead_on_return attribute optionally sized

2026-01-21 08:22:05 -08:00

riscv32-ilp32d-abi.cpp

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riscv32-ilp32e-error.c

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riscv32-int128-abi.c

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riscv32-vararg.c

[IR] Make dead_on_return attribute optionally sized

2026-01-21 08:22:05 -08:00

riscv64-abi.c

[IR] Make dead_on_return attribute optionally sized

2026-01-21 08:22:05 -08:00

riscv64-vararg.c

[IR] Make dead_on_return attribute optionally sized

2026-01-21 08:22:05 -08:00

riscv-abi.cpp

[IR] Make dead_on_return attribute optionally sized

2026-01-21 08:22:05 -08:00

riscv-atomics.c

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riscv-attr-builtin-alias-err.c

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riscv-attr-builtin-alias.c

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riscv-cf-protection.c

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riscv-func-attr-target-err.c

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riscv-func-attr-target.c

[RISCV] Make "target-feature +i" explicit (#157835 )

2025-09-11 08:49:06 +02:00

riscv-inline-asm-clobber.c

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riscv-inline-asm-fixed-length-vector.c

[RISCV][llvm] Support fixed-length vector inline assembly constraints (#150724 )

2025-08-18 03:36:12 +00:00

riscv-inline-asm-rvv.c

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riscv-inline-asm.c

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riscv-metadata-arch.c

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riscv-metadata.c

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riscv-sdata-module-flag.c

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riscv-v-lifetime.cpp

[IR] Remove size argument from lifetime intrinsics (#150248 )

2025-08-08 11:09:34 +02:00

riscv-vector-callingconv-llvm-ir.c

[IR] Make dead_on_return attribute optionally sized

2026-01-21 08:22:05 -08:00

riscv-vector-callingconv-llvm-ir.cpp

[IR] Make dead_on_return attribute optionally sized

2026-01-21 08:22:05 -08:00

riscv-vector-callingconv.c

[Clang] include attribute scope in diagnostics (#144619 )

2025-07-08 11:36:52 +03:00

riscv-vector-callingconv.cpp

[Clang] include attribute scope in diagnostics (#144619 )

2025-07-08 11:36:52 +03:00

riscv-xandesbfhcvt-c-api.c

[RISCV] Implement Builtins for XAndesBFHCvt extension. (#148804 )

2025-07-16 16:13:31 +08:00

riscv-xandesbfhcvt.c

[RISCV] Implement Builtins for XAndesBFHCvt extension. (#148804 )

2025-07-16 16:13:31 +08:00

riscv-xandesperf-c-api-rv32.c

[RISCV] Implement Clang Builtins for XAndesPerf Extension (#147018 )

2025-12-17 08:43:37 +00:00

riscv-xandesperf-c-api-rv64.c

[RISCV] Implement Clang Builtins for XAndesPerf Extension (#147018 )

2025-12-17 08:43:37 +00:00

riscv-xandesperf-rv32.c

[RISCV] Implement Clang Builtins for XAndesPerf Extension (#147018 )

2025-12-17 08:43:37 +00:00

riscv-xandesperf-rv64.c

[RISCV] Implement Clang Builtins for XAndesPerf Extension (#147018 )

2025-12-17 08:43:37 +00:00

riscv-xcvalu-c-api.c

[RISCV] Run mem2reg for riscv-xcvalu-c-api.c and riscv-xcvalu.c. NFC.

2025-07-08 11:04:10 +08:00

riscv-xcvalu.c

[RISCV] Run mem2reg for riscv-xcvalu-c-api.c and riscv-xcvalu.c. NFC.

2025-07-08 11:04:10 +08:00

riscv-zihintpause.c

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rvv-vls-arith-ops.c

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rvv-vls-bitwise-ops.c

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rvv-vls-compare-ops.c

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rvv-vls-shift-ops.c

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rvv-vls-subscript-ops.c

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tls-dialect.c

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vector-bits-vscale-range.c

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