e2d7cd685d
This patch makes the dead_on_return parameter attribute optionally require a number
of bytes to be passed in to specify the number of bytes known to be dead
upon function return/unwind. This is aimed at enabling annotating the
this pointer in C++ destructors with dead_on_return in clang. We need
this to handle cases like the following:
```
struct X {
int n;
~X() {
this[n].n = 0;
}
};
void f() {
X xs[] = {42, -1};
}
```
Where we only certain that sizeof(X) bytes are dead upon return of ~X.
Otherwise DSE would be able to eliminate the store in ~X which would not
be correct.
This patch only does the wiring within IR. Future patches will make
clang emit correct sizing information and update DSE to only delete
stores to objects marked dead_on_return that are provably in bounds of
the number of bytes specified to be dead_on_return.
Reviewers: nikic, alinas, antoniofrighetto
Pull Request: https://github.com/llvm/llvm-project/pull/171712
175 lines
9.4 KiB
C++
175 lines
9.4 KiB
C++
// REQUIRES: riscv-registered-target
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// RUN: %clang_cc1 -std=c++11 -triple riscv64 -target-feature +v \
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// RUN: -emit-llvm %s -o - | FileCheck -check-prefix=CHECK-LLVM %s
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// RUN: %clang_cc1 -std=c++11 -triple riscv64 -target-feature +zve32x \
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// RUN: -emit-llvm %s -o - | FileCheck -check-prefix=CHECK-LLVM-ZVE32X %s
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#include <riscv_vector.h>
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// CHECK-LLVM: call riscv_vector_cc <vscale x 2 x i32> @_Z3baru15__rvv_int32m1_t
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vint32m1_t __attribute__((riscv_vector_cc)) bar(vint32m1_t input);
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vint32m1_t test_vector_cc_attr(vint32m1_t input, int32_t *base, size_t vl) {
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vint32m1_t val = __riscv_vle32_v_i32m1(base, vl);
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vint32m1_t ret = bar(input);
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__riscv_vse32_v_i32m1(base, val, vl);
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return ret;
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}
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// CHECK-LLVM: call riscv_vector_cc <vscale x 2 x i32> @_Z3baru15__rvv_int32m1_t
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[[riscv::vector_cc]] vint32m1_t bar(vint32m1_t input);
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vint32m1_t test_vector_cc_attr2(vint32m1_t input, int32_t *base, size_t vl) {
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vint32m1_t val = __riscv_vle32_v_i32m1(base, vl);
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vint32m1_t ret = bar(input);
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__riscv_vse32_v_i32m1(base, val, vl);
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return ret;
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}
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// CHECK-LLVM: call <vscale x 2 x i32> @_Z3bazu15__rvv_int32m1_t
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vint32m1_t baz(vint32m1_t input);
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vint32m1_t test_no_vector_cc_attr(vint32m1_t input, int32_t *base, size_t vl) {
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vint32m1_t val = __riscv_vle32_v_i32m1(base, vl);
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vint32m1_t ret = baz(input);
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__riscv_vse32_v_i32m1(base, val, vl);
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return ret;
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}
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// CHECK-LLVM: define dso_local void @_Z14test_vls_no_ccDv4_i(i128 noundef %arg.coerce)
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void test_vls_no_cc(__attribute__((vector_size(16))) int arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z25test_vls_default_abi_vlenDv4_i(<vscale x 2 x i32> noundef %arg.coerce)
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[[riscv::vls_cc]] void test_vls_default_abi_vlen(__attribute__((vector_size(16))) int arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z45test_vls_default_abi_vlen_unsupported_featureDv8_DF16_(<vscale x 8 x i8> noundef %arg.coerce)
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[[riscv::vls_cc]] void test_vls_default_abi_vlen_unsupported_feature(__attribute__((vector_size(16))) _Float16 arg) {}
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// CHECK-LLVM-ZVE32X: define dso_local riscv_vls_cc(128) void @_Z52test_vls_default_abi_vlen_unsupported_feature_zve32xDv4_f(<vscale x 8 x i8> noundef %arg.coerce)
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[[riscv::vls_cc]] void test_vls_default_abi_vlen_unsupported_feature_zve32x(__attribute__((vector_size(16))) float arg) {}
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// CHECK-LLVM-ZVE32X: define dso_local riscv_vls_cc(128) void @_Z55test_vls_default_abi_vlen_unsupported_feature_no_zve64xDv2_m(<vscale x 8 x i8> noundef %arg.coerce)
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[[riscv::vls_cc]] void test_vls_default_abi_vlen_unsupported_feature_no_zve64x(__attribute__((vector_size(16))) uint64_t arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z21test_vls_256_abi_vlenDv4_i(<vscale x 1 x i32> noundef %arg.coerce)
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[[riscv::vls_cc(256)]] void test_vls_256_abi_vlen(__attribute__((vector_size(16))) int arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(1024) void @_Z22test_vls_least_elementDv2_i(<vscale x 1 x i32> noundef %arg.coerce)
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[[riscv::vls_cc(1024)]] void test_vls_least_element(__attribute__((vector_size(8))) int arg) {}
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struct st_i32x4 {
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__attribute__((vector_size(16))) int i32;
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};
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struct st_i32x4_arr1 {
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__attribute__((vector_size(16))) int i32[1];
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};
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struct st_i32x4_arr4 {
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__attribute__((vector_size(16))) int i32[4];
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};
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struct st_i32x4_arr8 {
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__attribute__((vector_size(16))) int i32[8];
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};
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struct st_i32x4x2 {
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__attribute__((vector_size(16))) int i32_1;
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__attribute__((vector_size(16))) int i32_2;
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};
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struct st_i32x8x2 {
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__attribute__((vector_size(32))) int i32_1;
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__attribute__((vector_size(32))) int i32_2;
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};
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struct st_i32x64x2 {
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__attribute__((vector_size(256))) int i32_1;
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__attribute__((vector_size(256))) int i32_2;
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};
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struct st_i32x4x3 {
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__attribute__((vector_size(16))) int i32_1;
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__attribute__((vector_size(16))) int i32_2;
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__attribute__((vector_size(16))) int i32_3;
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};
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struct st_i32x4x8 {
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__attribute__((vector_size(16))) int i32_1;
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__attribute__((vector_size(16))) int i32_2;
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__attribute__((vector_size(16))) int i32_3;
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__attribute__((vector_size(16))) int i32_4;
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__attribute__((vector_size(16))) int i32_5;
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__attribute__((vector_size(16))) int i32_6;
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__attribute__((vector_size(16))) int i32_7;
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__attribute__((vector_size(16))) int i32_8;
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};
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struct st_i32x4x9 {
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__attribute__((vector_size(16))) int i32_1;
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__attribute__((vector_size(16))) int i32_2;
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__attribute__((vector_size(16))) int i32_3;
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__attribute__((vector_size(16))) int i32_4;
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__attribute__((vector_size(16))) int i32_5;
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__attribute__((vector_size(16))) int i32_6;
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__attribute__((vector_size(16))) int i32_7;
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__attribute__((vector_size(16))) int i32_8;
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__attribute__((vector_size(16))) int i32_9;
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};
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typedef int __attribute__((vector_size(256))) int32x64_t;
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z14test_too_largeDv64_i(ptr noundef dead_on_return %0)
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[[riscv::vls_cc]] void test_too_large(int32x64_t arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z18test_too_large_256Dv64_i(<vscale x 16 x i32> noundef %arg.coerce)
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[[riscv::vls_cc(256)]] void test_too_large_256(int32x64_t arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z13test_st_i32x48st_i32x4(<vscale x 2 x i32> %arg.target_coerce)
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[[riscv::vls_cc]] void test_st_i32x4(struct st_i32x4 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z17test_st_i32x4_2568st_i32x4(<vscale x 1 x i32> %arg.target_coerce)
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[[riscv::vls_cc(256)]] void test_st_i32x4_256(struct st_i32x4 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z18test_st_i32x4_arr113st_i32x4_arr1(<vscale x 2 x i32> %arg.target_coerce)
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[[riscv::vls_cc]] void test_st_i32x4_arr1(struct st_i32x4_arr1 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z22test_st_i32x4_arr1_25613st_i32x4_arr1(<vscale x 1 x i32> %arg.target_coerce)
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[[riscv::vls_cc(256)]] void test_st_i32x4_arr1_256(struct st_i32x4_arr1 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z18test_st_i32x4_arr413st_i32x4_arr4(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) %arg.target_coerce)
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[[riscv::vls_cc]] void test_st_i32x4_arr4(struct st_i32x4_arr4 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z22test_st_i32x4_arr4_25613st_i32x4_arr4(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) %arg.target_coerce)
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[[riscv::vls_cc(256)]] void test_st_i32x4_arr4_256(struct st_i32x4_arr4 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z18test_st_i32x4_arr813st_i32x4_arr8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %arg.target_coerce)
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[[riscv::vls_cc]] void test_st_i32x4_arr8(struct st_i32x4_arr8 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z22test_st_i32x4_arr8_25613st_i32x4_arr8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %arg.target_coerce)
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[[riscv::vls_cc(256)]] void test_st_i32x4_arr8_256(struct st_i32x4_arr8 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z15test_st_i32x4x210st_i32x4x2(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %arg.target_coerce)
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[[riscv::vls_cc]] void test_st_i32x4x2(struct st_i32x4x2 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z19test_st_i32x4x2_25610st_i32x4x2(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %arg.target_coerce)
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[[riscv::vls_cc(256)]] void test_st_i32x4x2_256(struct st_i32x4x2 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z15test_st_i32x8x210st_i32x8x2(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %arg.target_coerce)
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[[riscv::vls_cc]] void test_st_i32x8x2(struct st_i32x8x2 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z19test_st_i32x8x2_25610st_i32x8x2(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %arg.target_coerce)
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[[riscv::vls_cc(256)]] void test_st_i32x8x2_256(struct st_i32x8x2 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z16test_st_i32x64x211st_i32x64x2(ptr noundef dead_on_return %arg)
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[[riscv::vls_cc]] void test_st_i32x64x2(struct st_i32x64x2 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z20test_st_i32x64x2_25611st_i32x64x2(ptr noundef dead_on_return %arg)
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[[riscv::vls_cc(256)]] void test_st_i32x64x2_256(struct st_i32x64x2 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z15test_st_i32x4x310st_i32x4x3(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %arg.target_coerce)
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[[riscv::vls_cc]] void test_st_i32x4x3(struct st_i32x4x3 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z19test_st_i32x4x3_25610st_i32x4x3(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %arg.target_coerce)
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[[riscv::vls_cc(256)]] void test_st_i32x4x3_256(struct st_i32x4x3 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z15test_st_i32x4x810st_i32x4x8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %arg.target_coerce)
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[[riscv::vls_cc]] void test_st_i32x4x8(struct st_i32x4x8 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z19test_st_i32x4x8_25610st_i32x4x8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %arg.target_coerce)
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[[riscv::vls_cc(256)]] void test_st_i32x4x8_256(struct st_i32x4x8 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z15test_st_i32x4x910st_i32x4x9(ptr noundef dead_on_return %arg)
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[[riscv::vls_cc]] void test_st_i32x4x9(struct st_i32x4x9 arg) {}
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// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z19test_st_i32x4x9_25610st_i32x4x9(ptr noundef dead_on_return %arg)
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[[riscv::vls_cc(256)]] void test_st_i32x4x9_256(struct st_i32x4x9 arg) {}
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