3e0bf1c7a9
D25618 added a method to verify the instruction predicates for an emitted instruction, through verifyInstructionPredicates added into <Target>MCCodeEmitter::encodeInstruction. This is a very useful idea, but the implementation inside MCCodeEmitter made it only fire for object files, not assembly which most of the llvm test suite uses. This patch moves the code into the <Target>_MC::verifyInstructionPredicates method, inside the InstrInfo. The allows it to be called from other places, such as in this patch where it is called from the <Target>AsmPrinter::emitInstruction methods which should trigger for both assembly and object files. It can also be called from other places such as verifyInstruction, but that is not done here (it tends to catch errors earlier, but in reality just shows all the mir tests that have incorrect feature predicates). The interface was also simplified slightly, moving computeAvailableFeatures into the function so that it does not need to be called externally. The ARM, AMDGPU (but not R600), AVR, Mips and X86 backends all currently show errors in the test-suite, so have been disabled with FIXME comments. Recommitted with some fixes for the leftover MCII variables in release builds. Differential Revision: https://reviews.llvm.org/D129506
137 lines
4.5 KiB
C++
137 lines
4.5 KiB
C++
//===-- M68kMCTargetDesc.cpp - M68k Target Descriptions ---------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file provides M68k target specific descriptions.
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///
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//===----------------------------------------------------------------------===//
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#include "M68kMCTargetDesc.h"
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#include "M68kInstPrinter.h"
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#include "M68kMCAsmInfo.h"
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#include "TargetInfo/M68kTargetInfo.h"
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#include "llvm/MC/MCELFStreamer.h"
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#include "llvm/MC/MCInstPrinter.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/MC/MachineLocation.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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using namespace llvm;
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#define GET_INSTRINFO_MC_DESC
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#define ENABLE_INSTR_PREDICATE_VERIFIER
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#include "M68kGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "M68kGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "M68kGenRegisterInfo.inc"
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// TODO Implement feature set parsing logics
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static std::string ParseM68kTriple(const Triple &TT, StringRef CPU) {
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return "";
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}
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static MCInstrInfo *createM68kMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitM68kMCInstrInfo(X); // defined in M68kGenInstrInfo.inc
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return X;
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}
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static MCRegisterInfo *createM68kMCRegisterInfo(const Triple &TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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InitM68kMCRegisterInfo(X, llvm::M68k::A0, 0, 0, llvm::M68k::PC);
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return X;
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}
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static MCSubtargetInfo *createM68kMCSubtargetInfo(const Triple &TT,
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StringRef CPU, StringRef FS) {
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std::string ArchFS = ParseM68kTriple(TT, CPU);
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if (!FS.empty()) {
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if (!ArchFS.empty()) {
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ArchFS = (ArchFS + "," + FS).str();
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} else {
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ArchFS = FS.str();
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}
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}
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return createM68kMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, ArchFS);
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}
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static MCAsmInfo *createM68kMCAsmInfo(const MCRegisterInfo &MRI,
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const Triple &TT,
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const MCTargetOptions &TO) {
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MCAsmInfo *MAI = new M68kELFMCAsmInfo(TT);
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// Initialize initial frame state.
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// Calculate amount of bytes used for return address storing
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int StackGrowth = -4;
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// Initial state of the frame pointer is SP+StackGrowth.
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// TODO: Add tests for `cfi_*` directives
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(
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nullptr, MRI.getDwarfRegNum(llvm::M68k::SP, true), -StackGrowth);
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MAI->addInitialFrameState(Inst);
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// Add return address to move list
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Inst = MCCFIInstruction::createOffset(
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nullptr, MRI.getDwarfRegNum(M68k::PC, true), StackGrowth);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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static MCRelocationInfo *createM68kMCRelocationInfo(const Triple &TheTriple,
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MCContext &Ctx) {
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// Default to the stock relocation info.
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return llvm::createMCRelocationInfo(TheTriple, Ctx);
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}
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static MCInstPrinter *createM68kMCInstPrinter(const Triple &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI) {
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return new M68kInstPrinter(MAI, MII, MRI);
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}
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeM68kTargetMC() {
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Target &T = getTheM68kTarget();
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// Register the MC asm info.
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RegisterMCAsmInfoFn X(T, createM68kMCAsmInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(T, createM68kMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(T, createM68kMCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(T, createM68kMCSubtargetInfo);
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// Register the code emitter.
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TargetRegistry::RegisterMCCodeEmitter(T, createM68kMCCodeEmitter);
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// Register the MCInstPrinter.
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TargetRegistry::RegisterMCInstPrinter(T, createM68kMCInstPrinter);
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// Register the MC relocation info.
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TargetRegistry::RegisterMCRelocationInfo(T, createM68kMCRelocationInfo);
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// Register the asm backend.
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TargetRegistry::RegisterMCAsmBackend(T, createM68kAsmBackend);
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}
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