1c94388f38
The purpose of this optimization is to make the VL argument, for instructions that have a VL argument, as small as possible. This is implemented by visiting each instruction in reverse order and checking that if it has a VL argument, whether the VL can be reduced. By putting this pass before VSETVLI insertion, we see three kinds of changes to generated code: 1. Eliminate VSETVLI instructions 2. Reduce the VL toggle on VSETVLI instructions that also change vtype 3. Reduce the VL set by a VSETVLI instruction The list of supported instructions is currently whitelisted for safety. In the future, we could add more instructions to `isSupportedInstr` to support even more VL optimization. We originally wrote this pass because vector GEP instructions do not take a VL, which leads us to emit code that uses VL=VLMAX to implement GEP in the RISC-V backend. As a result, some of the vector instructions will write to lanes, specifically between the intended VL and VLMAX, that will never be read. As an alternative to this pass, we considered adding a vector predicated GEP instruction, but this would not fit well into the intrinsic type system since GEP has a variable number of arguments, each with arbitrary types. The second approach we considered was to put this pass after VSETVLI insertion, but we found that it was more difficult to recognize optimization opportunities, especially across basic block boundaries -- the data flow analysis was also a bit more expensive and complex. While this pass solves the GEP problem, we have expanded it to handle more cases of VL optimization, and there is opportunity for the analysis to be improved to enable even more optimization. We have a few follow up patches to post, but figured this would be a good start. --------- Co-authored-by: Craig Topper <craig.topper@sifive.com> Co-authored-by: Kito Cheng <kito.cheng@sifive.com>
111 lines
3.8 KiB
C++
111 lines
3.8 KiB
C++
//===-- RISCV.h - Top-level interface for RISC-V ----------------*- C++ -*-===//
|
|
//
|
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
|
// See https://llvm.org/LICENSE.txt for license information.
|
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file contains the entry points for global functions defined in the LLVM
|
|
// RISC-V back-end.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef LLVM_LIB_TARGET_RISCV_RISCV_H
|
|
#define LLVM_LIB_TARGET_RISCV_RISCV_H
|
|
|
|
#include "MCTargetDesc/RISCVBaseInfo.h"
|
|
#include "llvm/Target/TargetMachine.h"
|
|
|
|
namespace llvm {
|
|
class FunctionPass;
|
|
class InstructionSelector;
|
|
class PassRegistry;
|
|
class RISCVRegisterBankInfo;
|
|
class RISCVSubtarget;
|
|
class RISCVTargetMachine;
|
|
|
|
FunctionPass *createRISCVCodeGenPreparePass();
|
|
void initializeRISCVCodeGenPreparePass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVDeadRegisterDefinitionsPass();
|
|
void initializeRISCVDeadRegisterDefinitionsPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVIndirectBranchTrackingPass();
|
|
void initializeRISCVIndirectBranchTrackingPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVLandingPadSetupPass();
|
|
void initializeRISCVLandingPadSetupPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVISelDag(RISCVTargetMachine &TM,
|
|
CodeGenOptLevel OptLevel);
|
|
|
|
FunctionPass *createRISCVMakeCompressibleOptPass();
|
|
void initializeRISCVMakeCompressibleOptPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVGatherScatterLoweringPass();
|
|
void initializeRISCVGatherScatterLoweringPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVVectorPeepholePass();
|
|
void initializeRISCVVectorPeepholePass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVOptWInstrsPass();
|
|
void initializeRISCVOptWInstrsPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVMergeBaseOffsetOptPass();
|
|
void initializeRISCVMergeBaseOffsetOptPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVExpandPseudoPass();
|
|
void initializeRISCVExpandPseudoPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVPreRAExpandPseudoPass();
|
|
void initializeRISCVPreRAExpandPseudoPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVExpandAtomicPseudoPass();
|
|
void initializeRISCVExpandAtomicPseudoPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVInsertVSETVLIPass();
|
|
void initializeRISCVInsertVSETVLIPass(PassRegistry &);
|
|
extern char &RISCVInsertVSETVLIID;
|
|
|
|
FunctionPass *createRISCVPostRAExpandPseudoPass();
|
|
void initializeRISCVPostRAExpandPseudoPass(PassRegistry &);
|
|
FunctionPass *createRISCVInsertReadWriteCSRPass();
|
|
void initializeRISCVInsertReadWriteCSRPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVInsertWriteVXRMPass();
|
|
void initializeRISCVInsertWriteVXRMPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVRedundantCopyEliminationPass();
|
|
void initializeRISCVRedundantCopyEliminationPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVMoveMergePass();
|
|
void initializeRISCVMoveMergePass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVPushPopOptimizationPass();
|
|
void initializeRISCVPushPopOptPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVZacasABIFixPass();
|
|
void initializeRISCVZacasABIFixPass(PassRegistry &);
|
|
|
|
InstructionSelector *
|
|
createRISCVInstructionSelector(const RISCVTargetMachine &,
|
|
const RISCVSubtarget &,
|
|
const RISCVRegisterBankInfo &);
|
|
void initializeRISCVDAGToDAGISelLegacyPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVPostLegalizerCombiner();
|
|
void initializeRISCVPostLegalizerCombinerPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVO0PreLegalizerCombiner();
|
|
void initializeRISCVO0PreLegalizerCombinerPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVPreLegalizerCombiner();
|
|
void initializeRISCVPreLegalizerCombinerPass(PassRegistry &);
|
|
|
|
FunctionPass *createRISCVVLOptimizerPass();
|
|
void initializeRISCVVLOptimizerPass(PassRegistry &);
|
|
} // namespace llvm
|
|
|
|
#endif
|