4281f294a8
This PR introduces changes into processing of internal/service data in SPIRV Backend so that Duplicates Tracker accounts for possible changes in Constant usage after optimization, namely this PR fixes the case when a Constant register stored in Duplicates Tracker after all passes is represented by a non-constant expression. In this case we may be sure that it neither is able to create a duplicate nor is in need of a special placement as a Constant instruction. This PR doesn't introduce a new feature, and in this case we rely on existing set of test cases in the SPIRV Backend test suite to ensure that this PR doesn't break existing assumptions without introducing new test cases. There is a reproducer of the issue available as part of SYCL CTS test suite, however it's a binary of several MB's size. Given the subtlety of the issue, reduction of the reproducer to a reasonable site for inclusion into the SPIRV Backend test suite doesn't seem realistic.
122 lines
4.4 KiB
C++
122 lines
4.4 KiB
C++
//===-- SPIRVDuplicatesTracker.cpp - SPIR-V Duplicates Tracker --*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// General infrastructure for keeping track of the values that according to
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// the SPIR-V binary layout should be global to the whole module.
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//
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//===----------------------------------------------------------------------===//
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#include "SPIRVDuplicatesTracker.h"
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#include "SPIRVInstrInfo.h"
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#define DEBUG_TYPE "build-dep-graph"
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using namespace llvm;
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template <typename T>
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void SPIRVGeneralDuplicatesTracker::prebuildReg2Entry(
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SPIRVDuplicatesTracker<T> &DT, SPIRVReg2EntryTy &Reg2Entry,
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const SPIRVInstrInfo *TII) {
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for (auto &TPair : DT.getAllUses()) {
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for (auto &RegPair : TPair.second) {
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const MachineFunction *MF = RegPair.first;
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Register R = RegPair.second;
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MachineInstr *MI = MF->getRegInfo().getUniqueVRegDef(R);
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if (!MI || (TPair.second.getIsConst() && !TII->isConstantInstr(*MI)))
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continue;
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Reg2Entry[&MI->getOperand(0)] = &TPair.second;
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}
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}
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}
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void SPIRVGeneralDuplicatesTracker::buildDepsGraph(
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std::vector<SPIRV::DTSortableEntry *> &Graph, const SPIRVInstrInfo *TII,
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MachineModuleInfo *MMI = nullptr) {
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SPIRVReg2EntryTy Reg2Entry;
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prebuildReg2Entry(TT, Reg2Entry, TII);
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prebuildReg2Entry(CT, Reg2Entry, TII);
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prebuildReg2Entry(GT, Reg2Entry, TII);
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prebuildReg2Entry(FT, Reg2Entry, TII);
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prebuildReg2Entry(AT, Reg2Entry, TII);
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prebuildReg2Entry(MT, Reg2Entry, TII);
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prebuildReg2Entry(ST, Reg2Entry, TII);
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for (auto &Op2E : Reg2Entry) {
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SPIRV::DTSortableEntry *E = Op2E.second;
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Graph.push_back(E);
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for (auto &U : *E) {
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const MachineRegisterInfo &MRI = U.first->getRegInfo();
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MachineInstr *MI = MRI.getUniqueVRegDef(U.second);
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if (!MI)
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continue;
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assert(MI && MI->getParent() && "No MachineInstr created yet");
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for (auto i = MI->getNumDefs(); i < MI->getNumOperands(); i++) {
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MachineOperand &Op = MI->getOperand(i);
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if (!Op.isReg())
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continue;
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MachineInstr *VRegDef = MRI.getVRegDef(Op.getReg());
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// References to a function via function pointers generate virtual
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// registers without a definition. We are able to resolve this
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// reference using Globar Register info into an OpFunction instruction
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// but do not expect to find it in Reg2Entry.
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if (MI->getOpcode() == SPIRV::OpConstantFunctionPointerINTEL && i == 2)
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continue;
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MachineOperand *RegOp = &VRegDef->getOperand(0);
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if (Reg2Entry.count(RegOp) == 0 &&
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(MI->getOpcode() != SPIRV::OpVariable || i != 3)) {
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std::string DiagMsg;
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raw_string_ostream OS(DiagMsg);
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OS << "Unexpected pattern while building a dependency "
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"graph.\nInstruction: ";
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MI->print(OS);
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OS << "Operand: ";
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Op.print(OS);
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OS << "\nOperand definition: ";
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VRegDef->print(OS);
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report_fatal_error(DiagMsg.c_str());
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}
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if (Reg2Entry.count(RegOp))
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E->addDep(Reg2Entry[RegOp]);
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}
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if (E->getIsFunc()) {
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MachineInstr *Next = MI->getNextNode();
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if (Next && (Next->getOpcode() == SPIRV::OpFunction ||
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Next->getOpcode() == SPIRV::OpFunctionParameter)) {
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E->addDep(Reg2Entry[&Next->getOperand(0)]);
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}
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}
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}
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}
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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if (MMI) {
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const Module *M = MMI->getModule();
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for (auto F = M->begin(), E = M->end(); F != E; ++F) {
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const MachineFunction *MF = MMI->getMachineFunction(*F);
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if (!MF)
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continue;
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for (const MachineBasicBlock &MBB : *MF) {
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for (const MachineInstr &CMI : MBB) {
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MachineInstr &MI = const_cast<MachineInstr &>(CMI);
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MI.dump();
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if (MI.getNumExplicitDefs() > 0 &&
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Reg2Entry.count(&MI.getOperand(0))) {
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dbgs() << "\t[";
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for (SPIRV::DTSortableEntry *D :
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Reg2Entry.lookup(&MI.getOperand(0))->getDeps())
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dbgs() << Register::virtReg2Index(D->lookup(MF)) << ", ";
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dbgs() << "]\n";
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}
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}
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}
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}
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}
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#endif
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}
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