Matt Arsenault 5615657209

AMDGPU: Builtin & CodeGen support for v_cvt_sr_{bf16|f16}_f32 instructions (#117824) ...

Co-authored-by: Shilei Tian <shilei.tian@amd.com>

2024-11-26 23:37:05 -05:00

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Unix

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Windows

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AArch64TargetParser.cpp

[AArch64] Make +sve2-aes an alias of +sve2+sve-aes (#116026)

2024-11-14 11:04:04 +00:00

ARMTargetParser.cpp

[LLVM] [Clang] Support for Gentoo *t64 triples (64-bit time_t ABIs) (#111302)

2024-10-14 11:18:04 +00:00

ARMTargetParserCommon.cpp

[ARM][AArch64] Introduce the Armv9.6-A architecture version (#110825)

2024-10-04 10:12:41 +01:00

CMakeLists.txt

[PowerPC] add TargetParser for PPC target (#97541)

2024-07-25 13:46:59 +08:00

CSKYTargetParser.cpp

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Host.cpp

[LoongArch] Support LA V1.1 feature that div.w[u] and mod.w[u] instructions with inputs not signed-extended. (#116764)

2024-11-26 21:57:29 +08:00

LoongArchTargetParser.cpp

[LoongArch] Support LA V1.1 feature that div.w[u] and mod.w[u] instructions with inputs not signed-extended. (#116764)

2024-11-26 21:57:29 +08:00

PPCTargetParser.cpp

[PowerPC] fix default cpu setting

2024-07-25 09:55:00 -04:00

RISCVISAInfo.cpp

[RISCV] Zabha/Zacas implies Zaamo (#115694)

2024-11-12 15:49:34 +08:00

RISCVTargetParser.cpp

[RISCV] Support __builtin_cpu_is

2024-11-22 22:58:54 +08:00

SubtargetFeature.cpp

[TargetParser] Remove unused includes (NFC) (#116929)

2024-11-20 06:52:45 -08:00

TargetParser.cpp

AMDGPU: Builtin & CodeGen support for v_cvt_sr_{bf16|f16}_f32 instructions (#117824)

2024-11-26 23:37:05 -05:00

Triple.cpp

[LLVM] Add environment triple for 'llvm' (#117218)

2024-11-21 17:30:18 -06:00

X86TargetParser.cpp

Reland "[X86] Support -march=diamondrapids (#113881)" (#116564)

2024-11-18 10:40:32 +08:00