48e54f3a22
In the AArch64 version this helps reduce the number of blr instruction (indirect jumps) in from 325 to 87, and reduces the size of the object file by 4%. It seems to help make the code more efficient even if it doesn't greatly affect compile time. The AMDGPU variants are already marked as final.
89 lines
3.3 KiB
C++
89 lines
3.3 KiB
C++
//===------ BPFTargetTransformInfo.h - BPF specific TTI ---------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file uses the target's specific information to
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// provide more precise answers to certain TTI queries, while letting the
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// target independent and default TTI implementations handle the rest.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_BPF_BPFTARGETTRANSFORMINFO_H
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#define LLVM_LIB_TARGET_BPF_BPFTARGETTRANSFORMINFO_H
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#include "BPFTargetMachine.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/BasicTTIImpl.h"
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#include "llvm/Transforms/Utils/ScalarEvolutionExpander.h"
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namespace llvm {
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class BPFTTIImpl final : public BasicTTIImplBase<BPFTTIImpl> {
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typedef BasicTTIImplBase<BPFTTIImpl> BaseT;
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typedef TargetTransformInfo TTI;
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friend BaseT;
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const BPFSubtarget *ST;
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const BPFTargetLowering *TLI;
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const BPFSubtarget *getST() const { return ST; }
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const BPFTargetLowering *getTLI() const { return TLI; }
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public:
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explicit BPFTTIImpl(const BPFTargetMachine *TM, const Function &F)
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: BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
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TLI(ST->getTargetLowering()) {}
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InstructionCost getIntImmCost(const APInt &Imm, Type *Ty,
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TTI::TargetCostKind CostKind) const override {
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if (Imm.getBitWidth() <= 64 && isInt<32>(Imm.getSExtValue()))
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return TTI::TCC_Free;
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return TTI::TCC_Basic;
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}
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InstructionCost getCmpSelInstrCost(
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unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
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TTI::TargetCostKind CostKind,
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TTI::OperandValueInfo Op1Info = {TTI::OK_AnyValue, TTI::OP_None},
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TTI::OperandValueInfo Op2Info = {TTI::OK_AnyValue, TTI::OP_None},
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const llvm::Instruction *I = nullptr) const override {
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if (Opcode == Instruction::Select)
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return SCEVCheapExpansionBudget.getValue();
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return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
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Op1Info, Op2Info, I);
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}
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InstructionCost getArithmeticInstrCost(
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unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
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TTI::OperandValueInfo Op1Info = {TTI::OK_AnyValue, TTI::OP_None},
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TTI::OperandValueInfo Op2Info = {TTI::OK_AnyValue, TTI::OP_None},
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ArrayRef<const Value *> Args = {},
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const Instruction *CxtI = nullptr) const override {
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int ISD = TLI->InstructionOpcodeToISD(Opcode);
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if (ISD == ISD::ADD && CostKind == TTI::TCK_RecipThroughput)
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return SCEVCheapExpansionBudget.getValue() + 1;
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return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Op1Info,
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Op2Info);
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}
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TTI::MemCmpExpansionOptions
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enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const override {
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TTI::MemCmpExpansionOptions Options;
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Options.LoadSizes = {8, 4, 2, 1};
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Options.MaxNumLoads = TLI->getMaxExpandSizeMemcmp(OptSize);
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return Options;
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}
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unsigned getMaxNumArgs() const override { return 5; }
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_BPF_BPFTARGETTRANSFORMINFO_H
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