303 lines
14 KiB
LLVM
303 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -enable-unsafe-fp-math < %s | FileCheck -check-prefixes=GCN,GCN-UNSAFE,SI,SI-UNSAFE %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,GCN-SAFE,SI,SI-SAFE %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=hawaii -enable-unsafe-fp-math < %s | FileCheck -check-prefixes=GCN,GCN-UNSAFE,CI,CI-UNSAFE %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=hawaii < %s | FileCheck -check-prefixes=GCN,GCN-SAFE,CI,CI-SAFE %s
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declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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declare double @llvm.sqrt.f64(double) nounwind readnone
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define amdgpu_kernel void @rsq_f64(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #0 {
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; GCN-UNSAFE-LABEL: rsq_f64:
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; GCN-UNSAFE: ; %bb.0:
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; GCN-UNSAFE-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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; GCN-UNSAFE-NEXT: s_mov_b32 s7, 0xf000
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; GCN-UNSAFE-NEXT: s_mov_b32 s6, -1
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; GCN-UNSAFE-NEXT: s_mov_b32 s10, s6
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; GCN-UNSAFE-NEXT: s_mov_b32 s11, s7
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; GCN-UNSAFE-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-UNSAFE-NEXT: s_mov_b32 s8, s2
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; GCN-UNSAFE-NEXT: s_mov_b32 s9, s3
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; GCN-UNSAFE-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
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; GCN-UNSAFE-NEXT: s_mov_b32 s4, s0
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; GCN-UNSAFE-NEXT: s_mov_b32 s5, s1
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; GCN-UNSAFE-NEXT: s_waitcnt vmcnt(0)
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; GCN-UNSAFE-NEXT: v_sqrt_f64_e32 v[0:1], v[0:1]
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; GCN-UNSAFE-NEXT: v_rcp_f64_e32 v[2:3], v[0:1]
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; GCN-UNSAFE-NEXT: v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
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; GCN-UNSAFE-NEXT: v_fma_f64 v[2:3], v[4:5], v[2:3], v[2:3]
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; GCN-UNSAFE-NEXT: v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
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; GCN-UNSAFE-NEXT: v_fma_f64 v[2:3], v[4:5], v[2:3], v[2:3]
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; GCN-UNSAFE-NEXT: v_fma_f64 v[0:1], -v[0:1], v[2:3], 1.0
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; GCN-UNSAFE-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[2:3]
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; GCN-UNSAFE-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
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; GCN-UNSAFE-NEXT: s_endpgm
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;
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; SI-SAFE-LABEL: rsq_f64:
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; SI-SAFE: ; %bb.0:
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; SI-SAFE-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
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; SI-SAFE-NEXT: s_mov_b32 s3, 0xf000
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; SI-SAFE-NEXT: s_mov_b32 s2, -1
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; SI-SAFE-NEXT: s_mov_b32 s10, s2
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; SI-SAFE-NEXT: s_mov_b32 s11, s3
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; SI-SAFE-NEXT: s_waitcnt lgkmcnt(0)
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; SI-SAFE-NEXT: s_mov_b32 s8, s6
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; SI-SAFE-NEXT: s_mov_b32 s9, s7
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; SI-SAFE-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
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; SI-SAFE-NEXT: s_waitcnt vmcnt(0)
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; SI-SAFE-NEXT: v_sqrt_f64_e32 v[0:1], v[0:1]
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; SI-SAFE-NEXT: v_div_scale_f64 v[2:3], s[0:1], v[0:1], v[0:1], 1.0
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; SI-SAFE-NEXT: v_rcp_f64_e32 v[4:5], v[2:3]
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; SI-SAFE-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3
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; SI-SAFE-NEXT: v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
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; SI-SAFE-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
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; SI-SAFE-NEXT: v_div_scale_f64 v[6:7], s[0:1], 1.0, v[0:1], 1.0
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; SI-SAFE-NEXT: v_fma_f64 v[8:9], -v[2:3], v[4:5], 1.0
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; SI-SAFE-NEXT: s_mov_b32 s0, 0x3ff00000
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; SI-SAFE-NEXT: v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
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; SI-SAFE-NEXT: v_cmp_eq_u32_e64 s[0:1], s0, v7
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; SI-SAFE-NEXT: v_mul_f64 v[8:9], v[6:7], v[4:5]
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; SI-SAFE-NEXT: s_xor_b64 vcc, s[0:1], vcc
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; SI-SAFE-NEXT: v_fma_f64 v[2:3], -v[2:3], v[8:9], v[6:7]
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; SI-SAFE-NEXT: s_mov_b32 s0, s4
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; SI-SAFE-NEXT: v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[8:9]
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; SI-SAFE-NEXT: s_mov_b32 s1, s5
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; SI-SAFE-NEXT: v_div_fixup_f64 v[0:1], v[2:3], v[0:1], 1.0
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; SI-SAFE-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
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; SI-SAFE-NEXT: s_endpgm
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;
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; CI-SAFE-LABEL: rsq_f64:
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; CI-SAFE: ; %bb.0:
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; CI-SAFE-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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; CI-SAFE-NEXT: s_mov_b32 s7, 0xf000
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; CI-SAFE-NEXT: s_mov_b32 s6, -1
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; CI-SAFE-NEXT: s_mov_b32 s10, s6
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; CI-SAFE-NEXT: s_mov_b32 s11, s7
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; CI-SAFE-NEXT: s_waitcnt lgkmcnt(0)
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; CI-SAFE-NEXT: s_mov_b32 s8, s2
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; CI-SAFE-NEXT: s_mov_b32 s9, s3
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; CI-SAFE-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
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; CI-SAFE-NEXT: s_mov_b32 s4, s0
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; CI-SAFE-NEXT: s_mov_b32 s5, s1
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; CI-SAFE-NEXT: s_waitcnt vmcnt(0)
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; CI-SAFE-NEXT: v_sqrt_f64_e32 v[0:1], v[0:1]
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; CI-SAFE-NEXT: v_div_scale_f64 v[2:3], s[2:3], v[0:1], v[0:1], 1.0
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; CI-SAFE-NEXT: v_div_scale_f64 v[8:9], vcc, 1.0, v[0:1], 1.0
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; CI-SAFE-NEXT: v_rcp_f64_e32 v[4:5], v[2:3]
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; CI-SAFE-NEXT: v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
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; CI-SAFE-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
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; CI-SAFE-NEXT: v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
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; CI-SAFE-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
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; CI-SAFE-NEXT: v_mul_f64 v[6:7], v[8:9], v[4:5]
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; CI-SAFE-NEXT: v_fma_f64 v[2:3], -v[2:3], v[6:7], v[8:9]
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; CI-SAFE-NEXT: v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[6:7]
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; CI-SAFE-NEXT: v_div_fixup_f64 v[0:1], v[2:3], v[0:1], 1.0
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; CI-SAFE-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
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; CI-SAFE-NEXT: s_endpgm
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%val = load double, ptr addrspace(1) %in, align 4
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%sqrt = call double @llvm.sqrt.f64(double %val) nounwind readnone
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%div = fdiv double 1.0, %sqrt
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store double %div, ptr addrspace(1) %out, align 4
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ret void
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}
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define amdgpu_kernel void @neg_rsq_f64(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #0 {
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; GCN-UNSAFE-LABEL: neg_rsq_f64:
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; GCN-UNSAFE: ; %bb.0:
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; GCN-UNSAFE-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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; GCN-UNSAFE-NEXT: s_mov_b32 s7, 0xf000
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; GCN-UNSAFE-NEXT: s_mov_b32 s6, -1
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; GCN-UNSAFE-NEXT: s_mov_b32 s10, s6
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; GCN-UNSAFE-NEXT: s_mov_b32 s11, s7
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; GCN-UNSAFE-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-UNSAFE-NEXT: s_mov_b32 s8, s2
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; GCN-UNSAFE-NEXT: s_mov_b32 s9, s3
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; GCN-UNSAFE-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
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; GCN-UNSAFE-NEXT: s_mov_b32 s4, s0
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; GCN-UNSAFE-NEXT: s_mov_b32 s5, s1
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; GCN-UNSAFE-NEXT: s_waitcnt vmcnt(0)
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; GCN-UNSAFE-NEXT: v_sqrt_f64_e32 v[0:1], v[0:1]
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; GCN-UNSAFE-NEXT: v_rcp_f64_e32 v[2:3], v[0:1]
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; GCN-UNSAFE-NEXT: v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
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; GCN-UNSAFE-NEXT: v_fma_f64 v[2:3], v[4:5], v[2:3], v[2:3]
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; GCN-UNSAFE-NEXT: v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
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; GCN-UNSAFE-NEXT: v_fma_f64 v[2:3], v[4:5], v[2:3], v[2:3]
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; GCN-UNSAFE-NEXT: v_mul_f64 v[4:5], v[2:3], -1.0
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; GCN-UNSAFE-NEXT: v_fma_f64 v[0:1], -v[0:1], v[4:5], -1.0
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; GCN-UNSAFE-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
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; GCN-UNSAFE-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
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; GCN-UNSAFE-NEXT: s_endpgm
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;
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; SI-SAFE-LABEL: neg_rsq_f64:
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; SI-SAFE: ; %bb.0:
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; SI-SAFE-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
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; SI-SAFE-NEXT: s_mov_b32 s3, 0xf000
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; SI-SAFE-NEXT: s_mov_b32 s2, -1
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; SI-SAFE-NEXT: s_mov_b32 s10, s2
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; SI-SAFE-NEXT: s_mov_b32 s11, s3
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; SI-SAFE-NEXT: s_waitcnt lgkmcnt(0)
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; SI-SAFE-NEXT: s_mov_b32 s8, s6
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; SI-SAFE-NEXT: s_mov_b32 s9, s7
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; SI-SAFE-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
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; SI-SAFE-NEXT: s_waitcnt vmcnt(0)
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; SI-SAFE-NEXT: v_sqrt_f64_e32 v[0:1], v[0:1]
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; SI-SAFE-NEXT: v_div_scale_f64 v[2:3], s[0:1], v[0:1], v[0:1], -1.0
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; SI-SAFE-NEXT: v_rcp_f64_e32 v[4:5], v[2:3]
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; SI-SAFE-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3
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; SI-SAFE-NEXT: v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
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; SI-SAFE-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
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; SI-SAFE-NEXT: v_div_scale_f64 v[6:7], s[0:1], -1.0, v[0:1], -1.0
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; SI-SAFE-NEXT: v_fma_f64 v[8:9], -v[2:3], v[4:5], 1.0
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; SI-SAFE-NEXT: s_mov_b32 s0, 0xbff00000
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; SI-SAFE-NEXT: v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
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; SI-SAFE-NEXT: v_cmp_eq_u32_e64 s[0:1], s0, v7
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; SI-SAFE-NEXT: v_mul_f64 v[8:9], v[6:7], v[4:5]
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; SI-SAFE-NEXT: s_xor_b64 vcc, s[0:1], vcc
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; SI-SAFE-NEXT: v_fma_f64 v[2:3], -v[2:3], v[8:9], v[6:7]
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; SI-SAFE-NEXT: s_mov_b32 s0, s4
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; SI-SAFE-NEXT: v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[8:9]
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; SI-SAFE-NEXT: s_mov_b32 s1, s5
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; SI-SAFE-NEXT: v_div_fixup_f64 v[0:1], v[2:3], v[0:1], -1.0
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; SI-SAFE-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
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; SI-SAFE-NEXT: s_endpgm
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;
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; CI-SAFE-LABEL: neg_rsq_f64:
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; CI-SAFE: ; %bb.0:
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; CI-SAFE-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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; CI-SAFE-NEXT: s_mov_b32 s7, 0xf000
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; CI-SAFE-NEXT: s_mov_b32 s6, -1
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; CI-SAFE-NEXT: s_mov_b32 s10, s6
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; CI-SAFE-NEXT: s_mov_b32 s11, s7
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; CI-SAFE-NEXT: s_waitcnt lgkmcnt(0)
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; CI-SAFE-NEXT: s_mov_b32 s8, s2
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; CI-SAFE-NEXT: s_mov_b32 s9, s3
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; CI-SAFE-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
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; CI-SAFE-NEXT: s_mov_b32 s4, s0
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; CI-SAFE-NEXT: s_mov_b32 s5, s1
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; CI-SAFE-NEXT: s_waitcnt vmcnt(0)
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; CI-SAFE-NEXT: v_sqrt_f64_e32 v[0:1], v[0:1]
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; CI-SAFE-NEXT: v_div_scale_f64 v[2:3], s[2:3], v[0:1], v[0:1], -1.0
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; CI-SAFE-NEXT: v_div_scale_f64 v[8:9], vcc, -1.0, v[0:1], -1.0
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; CI-SAFE-NEXT: v_rcp_f64_e32 v[4:5], v[2:3]
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; CI-SAFE-NEXT: v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
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; CI-SAFE-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
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; CI-SAFE-NEXT: v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
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; CI-SAFE-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
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; CI-SAFE-NEXT: v_mul_f64 v[6:7], v[8:9], v[4:5]
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; CI-SAFE-NEXT: v_fma_f64 v[2:3], -v[2:3], v[6:7], v[8:9]
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; CI-SAFE-NEXT: v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[6:7]
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; CI-SAFE-NEXT: v_div_fixup_f64 v[0:1], v[2:3], v[0:1], -1.0
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; CI-SAFE-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
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; CI-SAFE-NEXT: s_endpgm
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%val = load double, ptr addrspace(1) %in, align 4
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%sqrt = call double @llvm.sqrt.f64(double %val)
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%div = fdiv double -1.0, %sqrt
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store double %div, ptr addrspace(1) %out, align 4
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ret void
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}
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define amdgpu_kernel void @neg_rsq_neg_f64(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #0 {
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; GCN-UNSAFE-LABEL: neg_rsq_neg_f64:
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; GCN-UNSAFE: ; %bb.0:
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; GCN-UNSAFE-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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; GCN-UNSAFE-NEXT: s_mov_b32 s7, 0xf000
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; GCN-UNSAFE-NEXT: s_mov_b32 s6, -1
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; GCN-UNSAFE-NEXT: s_mov_b32 s10, s6
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; GCN-UNSAFE-NEXT: s_mov_b32 s11, s7
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; GCN-UNSAFE-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-UNSAFE-NEXT: s_mov_b32 s8, s2
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; GCN-UNSAFE-NEXT: s_mov_b32 s9, s3
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; GCN-UNSAFE-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
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; GCN-UNSAFE-NEXT: s_mov_b32 s4, s0
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; GCN-UNSAFE-NEXT: s_mov_b32 s5, s1
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; GCN-UNSAFE-NEXT: s_waitcnt vmcnt(0)
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; GCN-UNSAFE-NEXT: v_sqrt_f64_e64 v[0:1], -v[0:1]
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; GCN-UNSAFE-NEXT: v_rcp_f64_e32 v[2:3], v[0:1]
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; GCN-UNSAFE-NEXT: v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
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; GCN-UNSAFE-NEXT: v_fma_f64 v[2:3], v[4:5], v[2:3], v[2:3]
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; GCN-UNSAFE-NEXT: v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
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; GCN-UNSAFE-NEXT: v_fma_f64 v[2:3], v[4:5], v[2:3], v[2:3]
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; GCN-UNSAFE-NEXT: v_mul_f64 v[4:5], v[2:3], -1.0
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; GCN-UNSAFE-NEXT: v_fma_f64 v[0:1], -v[0:1], v[4:5], -1.0
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; GCN-UNSAFE-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
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; GCN-UNSAFE-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
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; GCN-UNSAFE-NEXT: s_endpgm
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;
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; SI-SAFE-LABEL: neg_rsq_neg_f64:
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; SI-SAFE: ; %bb.0:
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; SI-SAFE-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
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; SI-SAFE-NEXT: s_mov_b32 s3, 0xf000
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; SI-SAFE-NEXT: s_mov_b32 s2, -1
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; SI-SAFE-NEXT: s_mov_b32 s10, s2
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; SI-SAFE-NEXT: s_mov_b32 s11, s3
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; SI-SAFE-NEXT: s_waitcnt lgkmcnt(0)
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; SI-SAFE-NEXT: s_mov_b32 s8, s6
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; SI-SAFE-NEXT: s_mov_b32 s9, s7
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; SI-SAFE-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
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; SI-SAFE-NEXT: s_waitcnt vmcnt(0)
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; SI-SAFE-NEXT: v_sqrt_f64_e64 v[0:1], -v[0:1]
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; SI-SAFE-NEXT: v_div_scale_f64 v[2:3], s[0:1], v[0:1], v[0:1], -1.0
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; SI-SAFE-NEXT: v_rcp_f64_e32 v[4:5], v[2:3]
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; SI-SAFE-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3
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; SI-SAFE-NEXT: v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
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; SI-SAFE-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
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|
; SI-SAFE-NEXT: v_div_scale_f64 v[6:7], s[0:1], -1.0, v[0:1], -1.0
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; SI-SAFE-NEXT: v_fma_f64 v[8:9], -v[2:3], v[4:5], 1.0
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|
; SI-SAFE-NEXT: s_mov_b32 s0, 0xbff00000
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|
; SI-SAFE-NEXT: v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
|
|
; SI-SAFE-NEXT: v_cmp_eq_u32_e64 s[0:1], s0, v7
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|
; SI-SAFE-NEXT: v_mul_f64 v[8:9], v[6:7], v[4:5]
|
|
; SI-SAFE-NEXT: s_xor_b64 vcc, s[0:1], vcc
|
|
; SI-SAFE-NEXT: v_fma_f64 v[2:3], -v[2:3], v[8:9], v[6:7]
|
|
; SI-SAFE-NEXT: s_mov_b32 s0, s4
|
|
; SI-SAFE-NEXT: v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[8:9]
|
|
; SI-SAFE-NEXT: s_mov_b32 s1, s5
|
|
; SI-SAFE-NEXT: v_div_fixup_f64 v[0:1], v[2:3], v[0:1], -1.0
|
|
; SI-SAFE-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
|
|
; SI-SAFE-NEXT: s_endpgm
|
|
;
|
|
; CI-SAFE-LABEL: neg_rsq_neg_f64:
|
|
; CI-SAFE: ; %bb.0:
|
|
; CI-SAFE-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
|
|
; CI-SAFE-NEXT: s_mov_b32 s7, 0xf000
|
|
; CI-SAFE-NEXT: s_mov_b32 s6, -1
|
|
; CI-SAFE-NEXT: s_mov_b32 s10, s6
|
|
; CI-SAFE-NEXT: s_mov_b32 s11, s7
|
|
; CI-SAFE-NEXT: s_waitcnt lgkmcnt(0)
|
|
; CI-SAFE-NEXT: s_mov_b32 s8, s2
|
|
; CI-SAFE-NEXT: s_mov_b32 s9, s3
|
|
; CI-SAFE-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
|
|
; CI-SAFE-NEXT: s_mov_b32 s4, s0
|
|
; CI-SAFE-NEXT: s_mov_b32 s5, s1
|
|
; CI-SAFE-NEXT: s_waitcnt vmcnt(0)
|
|
; CI-SAFE-NEXT: v_sqrt_f64_e64 v[0:1], -v[0:1]
|
|
; CI-SAFE-NEXT: v_div_scale_f64 v[2:3], s[2:3], v[0:1], v[0:1], -1.0
|
|
; CI-SAFE-NEXT: v_div_scale_f64 v[8:9], vcc, -1.0, v[0:1], -1.0
|
|
; CI-SAFE-NEXT: v_rcp_f64_e32 v[4:5], v[2:3]
|
|
; CI-SAFE-NEXT: v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
|
|
; CI-SAFE-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
|
|
; CI-SAFE-NEXT: v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
|
|
; CI-SAFE-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
|
|
; CI-SAFE-NEXT: v_mul_f64 v[6:7], v[8:9], v[4:5]
|
|
; CI-SAFE-NEXT: v_fma_f64 v[2:3], -v[2:3], v[6:7], v[8:9]
|
|
; CI-SAFE-NEXT: v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[6:7]
|
|
; CI-SAFE-NEXT: v_div_fixup_f64 v[0:1], v[2:3], v[0:1], -1.0
|
|
; CI-SAFE-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
|
|
; CI-SAFE-NEXT: s_endpgm
|
|
%val = load double, ptr addrspace(1) %in, align 4
|
|
%val.fneg = fneg double %val
|
|
%sqrt = call double @llvm.sqrt.f64(double %val.fneg)
|
|
%div = fdiv double -1.0, %sqrt
|
|
store double %div, ptr addrspace(1) %out, align 4
|
|
ret void
|
|
}
|
|
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
|
|
; CI: {{.*}}
|
|
; CI-UNSAFE: {{.*}}
|
|
; GCN: {{.*}}
|
|
; GCN-SAFE: {{.*}}
|
|
; SI: {{.*}}
|
|
; SI-UNSAFE: {{.*}}
|