aa07f92210
Rename HLSL resource-related intrinsics to be consistent with the naming conventions discussed in [wg-hlsl:0014]. This is an entirely mechanical change, consisting of the following commands and automated formatting. ```sh git grep -l handle.fromBinding | xargs perl -pi -e \ 's/(dx|spv)(.)handle.fromBinding/$1$2resource$2handlefrombinding/g' git grep -l typedBufferLoad_checkbit | xargs perl -pi -e \ 's/(dx|spv)(.)typedBufferLoad_checkbit/$1$2resource$2loadchecked$2typedbuffer/g' git grep -l typedBufferLoad | xargs perl -pi -e \ 's/(dx|spv)(.)typedBufferLoad/$1$2resource$2load$2typedbuffer/g' git grep -l typedBufferStore | xargs perl -pi -e \ 's/(dx|spv)(.)typedBufferStore/$1$2resource$2store$2typedbuffer/g' git grep -l bufferUpdateCounter | xargs perl -pi -e \ 's/(dx|spv)(.)bufferUpdateCounter/$1$2resource$2updatecounter/g' git grep -l cast_handle | xargs perl -pi -e \ 's/(dx|spv)(.)cast.handle/$1$2resource$2casthandle/g' ``` [wg-hlsl:0014]: https://github.com/llvm/wg-hlsl/blob/main/proposals/0014-consistent-naming-for-dx-intrinsics.md
53 lines
3.4 KiB
LLVM
53 lines
3.4 KiB
LLVM
; RUN: opt -S -passes='early-cse<memssa>' %s -o %t
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; RUN: FileCheck --check-prefixes=CSE,CHECK %s < %t
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; Finish compiling to verify that dxil-op-lower removes the globals entirely.
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; RUN: opt -mtriple=dxil-pc-shadermodel6.0-compute -S -dxil-op-lower %t -o - | FileCheck --check-prefixes=DXOP,CHECK %s
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; RUN: opt -mtriple=dxil-pc-shadermodel6.6-compute -S -dxil-op-lower %t -o - | FileCheck --check-prefixes=DXOP,CHECK %s
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; RUN: llc -mtriple=dxil-pc-shadermodel6.0-compute --filetype=asm -o - %t | FileCheck --check-prefixes=DXOP,CHECK %s
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; RUN: llc -mtriple=dxil-pc-shadermodel6.6-compute --filetype=asm -o - %t | FileCheck --check-prefixes=DXOP,CHECK %s
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; Ensure that EarlyCSE is able to eliminate unneeded loads of resource globals across typedBufferLoad.
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; Also that DXILOpLowering eliminates the globals entirely.
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%"class.hlsl::RWBuffer" = type { target("dx.TypedBuffer", <4 x float>, 1, 0, 0) }
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; DXOP-NOT: @In = global
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; DXOP-NOT: @Out = global
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@In = global %"class.hlsl::RWBuffer" zeroinitializer, align 4
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@Out = global %"class.hlsl::RWBuffer" zeroinitializer, align 4
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; CHECK-LABEL define void @main()
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define void @main() local_unnamed_addr #0 {
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entry:
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; DXOP: %In_h.i1 = call %dx.types.Handle @dx.op.createHandle
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; DXOP: %Out_h.i2 = call %dx.types.Handle @dx.op.createHandle
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%In_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false)
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store target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %In_h.i, ptr @In, align 4
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%Out_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 4, i32 1, i32 1, i32 0, i1 false)
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store target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %Out_h.i, ptr @Out, align 4
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; CSE: call i32 @llvm.dx.flattened.thread.id.in.group()
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%0 = call i32 @llvm.dx.flattened.thread.id.in.group()
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; CHECK-NOT: load {{.*}} ptr @In
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%1 = load target("dx.TypedBuffer", <4 x float>, 1, 0, 0), ptr @In, align 4
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; CSE: call noundef <4 x float> @llvm.dx.resource.load.typedbuffer.v4f32.tdx.TypedBuffer_v4f32_1_0_0t
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%2 = call noundef <4 x float> @llvm.dx.resource.load.typedbuffer.v4f32.tdx.TypedBuffer_v4f32_1_0_0t(target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %1, i32 %0)
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; CHECK-NOT: load {{.*}} ptr @In
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%3 = load target("dx.TypedBuffer", <4 x float>, 1, 0, 0), ptr @In, align 4
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%4 = call noundef <4 x float> @llvm.dx.resource.load.typedbuffer.v4f32.tdx.TypedBuffer_v4f32_1_0_0t(target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %3, i32 %0)
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%add.i = fadd <4 x float> %2, %4
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call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v4f32_1_0_0t.v4f32(target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %Out_h.i, i32 %0, <4 x float> %add.i)
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; CHECK: ret void
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ret void
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}
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; CSE-DAG: declare <4 x float> @llvm.dx.resource.load.typedbuffer.v4f32.tdx.TypedBuffer_v4f32_1_0_0t(target("dx.TypedBuffer", <4 x float>, 1, 0, 0), i32) [[ROAttr:#[0-9]+]]
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; CSE-DAG: declare void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v4f32_1_0_0t.v4f32(target("dx.TypedBuffer", <4 x float>, 1, 0, 0), i32, <4 x float>) [[WOAttr:#[0-9]+]]
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attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="8,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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; Just need to split up the DAG searches.
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; CSE: attributes #0
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; CSE-DAG: attributes [[ROAttr]] = { {{.*}} memory(read) }
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; CSE-DAG: attributes [[WOAttr]] = { {{.*}} memory(write) }
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