b279f6b098
Similar to 806761a7629df268c8aed49657aeccffa6bca449
-mtriple= specifies the full target triple while -march= merely sets the
architecture part of the default target triple (e.g. Windows, macOS),
leaving a target triple which may not make sense.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
nvptx{,64}-apple-darwin as ELF instead of rejecting it outrightly.
84 lines
3.4 KiB
LLVM
84 lines
3.4 KiB
LLVM
; RUN: llc < %s -mtriple=nvptx -mcpu=sm_20 -verify-machineinstrs | FileCheck %s --check-prefix=PTX32
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; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -verify-machineinstrs | FileCheck %s --check-prefix=PTX64
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; RUN: %if ptxas && !ptxas-12.0 %{ llc < %s -mtriple=nvptx -mcpu=sm_20 -verify-machineinstrs | %ptxas-verify %}
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -verify-machineinstrs | %ptxas-verify %}
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; Ensure we access the local stack properly
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; PTX32: mov.u32 %SPL, __local_depot{{[0-9]+}};
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; PTX32: cvta.local.u32 %SP, %SPL;
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; PTX32: ld.param.u32 %r{{[0-9]+}}, [foo_param_0];
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; PTX32: st.volatile.u32 [%SP], %r{{[0-9]+}};
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; PTX64: mov.u64 %SPL, __local_depot{{[0-9]+}};
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; PTX64: cvta.local.u64 %SP, %SPL;
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; PTX64: ld.param.u32 %r{{[0-9]+}}, [foo_param_0];
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; PTX64: st.volatile.u32 [%SP], %r{{[0-9]+}};
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define void @foo(i32 %a) {
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%local = alloca i32, align 4
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store volatile i32 %a, ptr %local
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ret void
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}
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; PTX32: mov.u32 %SPL, __local_depot{{[0-9]+}};
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; PTX32: cvta.local.u32 %SP, %SPL;
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; PTX32: ld.param.u32 %r{{[0-9]+}}, [foo2_param_0];
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; PTX32: add.u32 %r[[SP_REG:[0-9]+]], %SPL, 0;
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; PTX32: st.local.u32 [%r[[SP_REG]]], %r{{[0-9]+}};
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; PTX64: mov.u64 %SPL, __local_depot{{[0-9]+}};
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; PTX64: cvta.local.u64 %SP, %SPL;
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; PTX64: ld.param.u32 %r{{[0-9]+}}, [foo2_param_0];
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; PTX64: add.u64 %rd[[SP_REG:[0-9]+]], %SPL, 0;
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; PTX64: st.local.u32 [%rd[[SP_REG]]], %r{{[0-9]+}};
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define void @foo2(i32 %a) {
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%local = alloca i32, align 4
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store i32 %a, ptr %local
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call void @bar(ptr %local)
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ret void
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}
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declare void @bar(ptr %a)
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!nvvm.annotations = !{!0}
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!0 = !{ptr @foo2, !"kernel", i32 1}
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; PTX32: mov.u32 %SPL, __local_depot{{[0-9]+}};
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; PTX32-NOT: cvta.local.u32 %SP, %SPL;
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; PTX32: ld.param.u32 %r{{[0-9]+}}, [foo3_param_0];
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; PTX32: add.u32 %r{{[0-9]+}}, %SPL, 0;
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; PTX32: st.local.u32 [%r{{[0-9]+}}], %r{{[0-9]+}};
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; PTX64: mov.u64 %SPL, __local_depot{{[0-9]+}};
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; PTX64-NOT: cvta.local.u64 %SP, %SPL;
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; PTX64: ld.param.u32 %r{{[0-9]+}}, [foo3_param_0];
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; PTX64: add.u64 %rd{{[0-9]+}}, %SPL, 0;
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; PTX64: st.local.u32 [%rd{{[0-9]+}}], %r{{[0-9]+}};
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define void @foo3(i32 %a) {
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%local = alloca [3 x i32], align 4
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%1 = getelementptr inbounds i32, ptr %local, i32 %a
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store i32 %a, ptr %1
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ret void
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}
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; PTX32: cvta.local.u32 %SP, %SPL;
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; PTX32: add.u32 {{%r[0-9]+}}, %SP, 0;
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; PTX32: add.u32 {{%r[0-9]+}}, %SPL, 0;
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; PTX32: add.u32 {{%r[0-9]+}}, %SP, 4;
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; PTX32: add.u32 {{%r[0-9]+}}, %SPL, 4;
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; PTX32: st.local.u32 [{{%r[0-9]+}}], {{%r[0-9]+}}
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; PTX32: st.local.u32 [{{%r[0-9]+}}], {{%r[0-9]+}}
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; PTX64: cvta.local.u64 %SP, %SPL;
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; PTX64: add.u64 {{%rd[0-9]+}}, %SP, 0;
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; PTX64: add.u64 {{%rd[0-9]+}}, %SPL, 0;
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; PTX64: add.u64 {{%rd[0-9]+}}, %SP, 4;
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; PTX64: add.u64 {{%rd[0-9]+}}, %SPL, 4;
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; PTX64: st.local.u32 [{{%rd[0-9]+}}], {{%r[0-9]+}}
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; PTX64: st.local.u32 [{{%rd[0-9]+}}], {{%r[0-9]+}}
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define void @foo4() {
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%A = alloca i32
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%B = alloca i32
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store i32 0, ptr %A
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store i32 0, ptr %B
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call void @bar(ptr %A)
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call void @bar(ptr %B)
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ret void
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}
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