Craig Topper b62826cc05

[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637) ...

This is alternative to #145965 that allows RegisterSDNode to be handled
without making a special case.

2025-07-02 09:44:54 -07:00

..

CMakeLists.txt

[SelectionDAG] Wire up -gen-sdnode-info TableGen backend (#125358)

2025-04-06 13:14:37 +03:00

DAGCombiner.cpp

[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)

2025-07-02 15:07:48 +01:00

FastISel.cpp

[RemoveDIs][NFC] Remove dbg intrinsic handling code from SelectionDAG ISel (#144702)

2025-06-18 16:04:18 +01:00

FunctionLoweringInfo.cpp

[RemoveDIs][NFC] Remove dbg intrinsic handling code from SelectionDAG ISel (#144702)

2025-06-18 16:04:18 +01:00

InstrEmitter.cpp

[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637)

2025-07-02 09:44:54 -07:00

InstrEmitter.h

[NFC] Reapply 3f37c517f, SmallDenseMap speedups

2024-09-26 10:49:29 +01:00

LegalizeDAG.cpp

[CodeGen] Construct SmallVector with ArrayRef (NFC) (#143391)

2025-06-09 12:45:52 -07:00

LegalizeFloatTypes.cpp

RuntimeLibcalls: Rename fminimum_num/fmaximum_num enums (#143078)

2025-06-06 16:23:26 +09:00

LegalizeIntegerTypes.cpp

[SelectionDAG][RISCV] Treat zext nneg as sext in PromoteIntOp_ZERO_EXTEND if the promoted input is sign extended. (#145120)

2025-06-21 18:56:00 -07:00

LegalizeTypes.cpp

[CodeGen] Use llvm::append_range (NFC) (#135567)

2025-04-13 16:36:03 -07:00

LegalizeTypes.h

[SelectionDAG][RISCV] Add support for splitting vp.splice (#145184)

2025-06-23 08:55:13 -07:00

LegalizeTypesGeneric.cpp

[SelectionDAG] Rename MemSDNode::getOriginalAlign to getBaseAlign. NFC (#139930)

2025-05-16 09:37:02 -07:00

LegalizeVectorOps.cpp

[LLVM][CodeGen][SVE] Add isel for bfloat unordered reductions. (#143540)

2025-06-20 11:46:25 +01:00

LegalizeVectorTypes.cpp

[SelectionDAG][RISCV] Add support for splitting vp.splice (#145184)

2025-06-23 08:55:13 -07:00

MatchContext.h

[DAG][RISCV] Use vp.<binop> when widening illegal types for binops which can trap (#105214)

2024-08-20 13:51:10 -07:00

ResourcePriorityQueue.cpp

…

ScheduleDAGFast.cpp

[CodeGen] Use range-based for loops (NFC) (#138488)

2025-05-05 10:08:49 -07:00

ScheduleDAGRRList.cpp

[SelectionDAG] Use Register and MCRegister. NFC

2025-03-02 22:33:25 -08:00

ScheduleDAGSDNodes.cpp

[SelectionDAG] Use Register and MCRegister. NFC

2025-03-02 22:33:25 -08:00

ScheduleDAGSDNodes.h

[SDAG] Use BatchAAResults for querying alias analysis (AA) results (#123934)

2025-01-23 09:16:09 +00:00

ScheduleDAGVLIW.cpp

[SDAG] Use BatchAAResults for querying alias analysis (AA) results (#123934)

2025-01-23 09:16:09 +00:00

SDNodeDbgValue.h

[llvm] Use llvm::copy (NFC) (#137470)

2025-04-26 15:50:38 -07:00

SDNodeInfo.cpp

[SelectionDAG] Wire up -gen-sdnode-info TableGen backend (#125358)

2025-04-06 13:14:37 +03:00

SelectionDAG.cpp

[DAG] canCreateUndefOrPoison - remove isGuaranteedNotToBeUndefOrPoison check for insert/extract vector element indices (#146514)

2025-07-01 14:01:54 +01:00

SelectionDAGAddressAnalysis.cpp

[AMDGPU][SDAG] Handle ISD::PTRADD in SelectionDAGAddressAnalysis (#142778)

2025-06-26 09:47:46 +02:00

SelectionDAGBuilder.cpp

DAG: Move get_dynamic_area_offset type check to IR verifier (#145268)

2025-06-24 11:11:52 +09:00

SelectionDAGBuilder.h

[RemoveDIs][NFC] Remove dbg intrinsic handling code from SelectionDAG ISel (#144702)

2025-06-18 16:04:18 +01:00

SelectionDAGDumper.cpp

[SDAG] Add partial_reduce_sumla node (#141267)

2025-06-09 07:17:45 -07:00

SelectionDAGISel.cpp

CodeGen: Emit error if getRegisterByName fails (#145194)

2025-06-23 16:33:35 +09:00

SelectionDAGPrinter.cpp

…

SelectionDAGTargetInfo.cpp

[SelectionDAG] Wire up -gen-sdnode-info TableGen backend (#125358)

2025-04-06 13:14:37 +03:00

StatepointLowering.cpp

[CodeGen] Avoid repeated hash lookups (NFC) (#131722)

2025-03-18 00:26:59 -07:00

StatepointLowering.h

…

TargetLowering.cpp

[TargetLowering] Fold (a | b) ==/!= b -> (a & ~b) ==/!= 0 when and-not exists (#145368)

2025-06-27 14:47:52 +01:00