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llvm-project/llvm/test/CodeGen/Mips/msa
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Alex MacLean 8ab917a241
Reland "[NVPTX] Legalize aext-load to zext-load to expose more DAG combines" (#155063) 
The original version of this change inadvertently dropped
b6e19b35cd87f3167a0f04a61a12016b935ab1ea. This version retains that fix
as well as adding tests for it and an explanation for why it is needed.
2025-08-25 09:15:44 -07:00
..
2r_vector_scalar.ll
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2r.ll
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2rf_exup.ll
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2rf_float_int.ll
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2rf_fq.ll
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2rf_int_float.ll
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2rf_tq.ll
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2rf.ll
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3r_4r_widen.ll
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3r_4r.ll
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3r_splat.ll
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3r-a.ll
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3r-b.ll
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3r-c.ll
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3r-d.ll
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3r-i.ll
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3r-m.ll
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3r-p.ll
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3r-s.ll
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3r-v.ll
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3rf_4rf_q.ll
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3rf_4rf.ll
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3rf_exdo.ll
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3rf_float_int.ll
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3rf_int_float.ll
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3rf_q.ll
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3rf.ll
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arithmetic_float.ll
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arithmetic.ll
[MIPS] Reland Add FeatureMSA to i6400 and i6500 cores (#134985) (#141730)
2025-05-30 22:33:34 -04:00
avoid_vector_shift_combines.ll
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basic_operations_float.ll
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basic_operations.ll
Reland "[NVPTX] Legalize aext-load to zext-load to expose more DAG combines" (#155063)
2025-08-25 09:15:44 -07:00
bit.ll
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bitcast.ll
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bitwise.ll
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bmzi_bmnzi.ll
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cc_without_nan.ll
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compare_float.ll
[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)
2025-07-02 15:07:48 +01:00
compare.ll
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elm_copy.ll
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elm_cxcmsa.ll
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elm_insv.ll
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elm_move.ll
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elm_shift_slide.ll
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emergency-spill.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
endian.ll
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f16-llvm-ir.ll
MIPSr6: Set FMAXNUM and FMINNUM as Legal (#139009)
2025-05-09 07:40:02 +08:00
fexuprl.ll
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frameindex.ll
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i5_ld_st.ll
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i5-a.ll
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i5-b.ll
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i5-c.ll
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i5-m.ll
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i5-s.ll
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i8.ll
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i10.ll
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immediates-bad.ll
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immediates.ll
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inline-asm.ll
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ldr_str.ll
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llvm-stress-s449609655-simplified.ll
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llvm-stress-s525530439.ll
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llvm-stress-s997348632.ll
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llvm-stress-s1704963983.ll
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llvm-stress-s1935737938.ll
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llvm-stress-s2090927243-simplified.ll
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llvm-stress-s2501752154-simplified.ll
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llvm-stress-s2704903805.ll
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llvm-stress-s3861334421.ll
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llvm-stress-s3926023935.ll
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llvm-stress-s3997499501.ll
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llvm-stress-sz1-s742806235.ll
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msa-nooddspreg.ll
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nori.b.ll
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remat-ldi.ll
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shift_constant_pool.ll
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shift_no_and.ll
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shift-dagcombine.ll
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shuffle.ll
[MIPS][MSA] Invert operand order of ILVOD when lowering VECTOR_SHUFFLE (#123555)
2025-01-21 15:54:10 +08:00
special.ll
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spill.ll
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vec.ll
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vecs10.ll
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