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llvm-project/llvm/lib/Target/AArch64
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Ricardo Jesus e7e4d99c58
[AArch64] Use vecshiftL64 instead of vecshiftR64 to match scalar SLI imm. (#139904) 
`SIMDScalarLShiftDTied` should be using `vecshiftL64` to match
the immediate argument rather than `vecshiftR64` as the latter
prevents the pattern from matching 0 (and allows 64 instead).

Fixes #139879.
2025-05-15 09:36:06 +01:00
..
AsmParser
[AArch64] Emit .arch and .arch_extension during assembly to textual asm (#138433)
2025-05-06 08:52:56 -07:00
Disassembler
[AArch64] Transition from MCSymbolRefExpr::VariantKind constants
2025-04-04 19:57:24 -07:00
GISel
[GlobalISel] Add a GISelValueTracker printing pass (#139687)
2025-05-14 11:05:04 +01:00
MCTargetDesc
[win][x64] Unwind v2 3/n: Add support for emitting unwind v2 information (equivalent to MSVC /d2epilogunwind) (#129142)
2025-05-09 10:42:10 -07:00
TargetInfo
…
Utils
Reland "[AArch64][SME] Split SMECallAttrs out of SMEAttrs" (#138671)
2025-05-15 08:37:08 +01:00
AArch64.h
Register assembly printer passes (#138348)
2025-05-06 18:01:17 -07:00
AArch64.td
[AARCH64] Add FEAT_SSVE_FEXPA and fix unsupported features list (#134368)
2025-04-16 15:20:05 +01:00
AArch64A53Fix835769.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64A57FPLoadBalancing.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64AdvSIMDScalarPass.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64Arm64ECCallLowering.cpp
[aarch64][x86][win] Add compiler support for MSVC's /funcoverride flag (Windows kernel loader replaceable functions) (#125320)
2025-05-09 14:56:38 -07:00
AArch64AsmPrinter.cpp
[aarch64][x86][win] Add compiler support for MSVC's /funcoverride flag (Windows kernel loader replaceable functions) (#125320)
2025-05-09 14:56:38 -07:00
AArch64BranchTargets.cpp
[AArch64][v8.5A] Omit BTI for non-addr-taken static fns in ELF (#135043)
2025-04-10 17:08:45 +01:00
AArch64CallingConvention.cpp
[AArch64] Do not split bfloat HFA args between regs and stack (#128909)
2025-02-27 11:38:41 +00:00
AArch64CallingConvention.h
…
AArch64CallingConvention.td
…
AArch64CleanupLocalDynamicTLSPass.cpp
[NFC][AArch64] Final Cleanup Pass Initialization (#137744)
2025-04-29 10:59:05 -07:00
AArch64CollectLOH.cpp
[CodeGen] Use MCRegister instead of MCPhysReg in RegisterMaskPair. NFC (#123688)
2025-01-21 07:04:35 -08:00
AArch64Combine.td
[AArch64] Fix a warning
2025-04-15 02:24:12 -07:00
AArch64CompressJumpTables.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64CondBrTuning.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64ConditionalCompares.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64ConditionOptimizer.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64DeadRegisterDefinitionsPass.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64ExpandImm.cpp
…
AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
[AArch64] Allow the clang.arc.attachedcall marker to be optional (#138694)
2025-05-08 16:49:31 +01:00
AArch64FalkorHWPFFix.cpp
[NFC][AArch64] Final Cleanup Pass Initialization (#137744)
2025-04-29 10:59:05 -07:00
AArch64FastISel.cpp
[AArch64][FastISel] Fallback on atomic stlr/cas with non-reg operands. (#133987)
2025-05-08 14:29:24 -07:00
AArch64Features.td
[AArch64][SVE] Fold ADD+CNTB to INCB/DECB (#118280)
2025-04-17 08:41:17 +01:00
AArch64FMV.td
[FMV][AArch64] Add feature CSSC and detect on linux platform. (#132727)
2025-03-26 08:40:29 +00:00
AArch64FrameLowering.cpp
[AArch64] Stop reserved registers from being saved in prolog/epilog (#138448)
2025-05-12 15:10:28 -07:00
AArch64FrameLowering.h
[CFIFixup] Fixup CFI for split functions with synchronous uwtables (#125299)
2025-02-11 18:25:08 -05:00
AArch64GenRegisterBankInfo.def
…
AArch64InstrAtomics.td
[AArch64][llvm] Codegen for 16/32/64-bit floating-point atomicrmw fminimum/faximum (#137703)
2025-04-30 22:08:44 +01:00
AArch64InstrFormats.td
[AArch64] Use vecshiftL64 instead of vecshiftR64 to match scalar SLI imm. (#139904)
2025-05-15 09:36:06 +01:00
AArch64InstrGISel.td
Reapply "[LLVM][ISel][AArch64 Remove AArch64ISD::FCM##z nodes. (#135817)"
2025-04-24 12:44:41 +00:00
AArch64InstrInfo.cpp
[AArch64] Correctly detect X reg from W reg in isCopyImpl (#137348)
2025-04-26 11:09:13 +01:00
AArch64InstrInfo.h
[BOLT][AArch64] Handle PAuth call instructions in isIndirectCall (#133227)
2025-04-08 13:23:10 +03:00
AArch64InstrInfo.td
[AArch64] Prefer using DUP instead of INS where possible (#138549)
2025-05-15 10:31:09 +02:00
AArch64ISelDAGToDAG.cpp
[AArch64] Utilize XAR for certain vector rotates (#137629)
2025-05-09 10:02:31 +01:00
AArch64ISelLowering.cpp
[SelectionDAG] Add an ISD node for for get.active.lane.mask (#139084)
2025-05-15 09:14:46 +01:00
AArch64ISelLowering.h
[SelectionDAG] Add an ISD node for for get.active.lane.mask (#139084)
2025-05-15 09:14:46 +01:00
AArch64LoadStoreOptimizer.cpp
[AArch64] Merge scaled and unscaled narrow zero stores (#136705)
2025-05-08 21:34:52 +03:00
AArch64LowerHomogeneousPrologEpilog.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64MachineFunctionInfo.cpp
[IR] Store Triple in Module (NFC) (#129868)
2025-03-06 10:27:47 +01:00
AArch64MachineFunctionInfo.h
[Target] Use *Set::insert_range (NFC) (#132140)
2025-03-20 09:09:30 -07:00
AArch64MachineScheduler.cpp
…
AArch64MachineScheduler.h
…
AArch64MacroFusion.cpp
…
AArch64MacroFusion.h
[CodeGen] Move MISched target hooks into TargetMachine (#125700)
2025-02-05 11:41:37 +05:30
AArch64MCInstLower.cpp
[AArch64] Transition from MCSymbolRefExpr::VariantKind constants
2025-04-04 19:57:24 -07:00
AArch64MCInstLower.h
…
AArch64MIPeepholeOpt.cpp
AArch64: Allow ZEXT+COPY -> FMOV peephole for ZPR registers as well (#135436)
2025-04-14 00:19:09 -07:00
AArch64PBQPRegAlloc.cpp
Revert "[CodeGen] Remove static member function Register::isPhysicalRegister. NFC"
2025-02-20 22:06:21 +00:00
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
…
AArch64PfmCounters.td
[Exegesis][AArch64] Use more generic cycles counter (#133376)
2025-03-30 16:59:53 -07:00
AArch64PointerAuth.cpp
[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)
2025-05-06 11:31:04 +02:00
AArch64PointerAuth.h
[AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (#110705)
2024-11-12 18:27:19 +03:00
AArch64PostCoalescerPass.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64Processors.td
[AARCH64] Add support for Cortex-A320 (#139055)
2025-05-09 16:24:48 +01:00
AArch64PromoteConstant.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64RedundantCopyElimination.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
[AArch64] Stop reserved registers from being saved in prolog/epilog (#138448)
2025-05-12 15:10:28 -07:00
AArch64RegisterInfo.h
[AArch64] Stop reserved registers from being saved in prolog/epilog (#138448)
2025-05-12 15:10:28 -07:00
AArch64RegisterInfo.td
[AArch64] Generalize integer FPR lane stores for all types (#134117)
2025-04-17 09:25:57 +01:00
AArch64SchedA53.td
…
AArch64SchedA55.td
…
AArch64SchedA57.td
…
AArch64SchedA57WriteRes.td
…
AArch64SchedA64FX.td
…
AArch64SchedA510.td
…
AArch64SchedAmpere1.td
…
AArch64SchedAmpere1B.td
…
AArch64SchedCyclone.td
…
AArch64SchedExynosM3.td
…
AArch64SchedExynosM4.td
…
AArch64SchedExynosM5.td
…
AArch64SchedFalkor.td
…
AArch64SchedFalkorDetails.td
…
AArch64SchedKryo.td
…
AArch64SchedKryoDetails.td
…
AArch64SchedNeoverseN1.td
…
AArch64SchedNeoverseN2.td
[AArch64][machine-scheduler][Neoverse-N2] fdiv is blocking (#119206)
2025-01-06 21:57:15 +00:00
AArch64SchedNeoverseN3.td
…
AArch64SchedNeoverseV1.td
[AArch64] Fix scheduling information for arithmetic and logical instructions. (#113542)
2024-12-04 09:30:44 +00:00
AArch64SchedNeoverseV2.td
[AArch64] Fix scheduling information for arithmetic and logical instructions. (#113542)
2024-12-04 09:30:44 +00:00
AArch64SchedOryon.td
…
AArch64SchedPredExynos.td
…
AArch64SchedPredicates.td
…
AArch64SchedPredNeoverse.td
…
AArch64SchedThunderX2T99.td
…
AArch64SchedThunderX3T110.td
…
AArch64SchedThunderX.td
…
AArch64SchedTSV110.td
…
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
[AArch64] Avoid unused variable warnings in release builds
2025-04-06 14:56:33 +02:00
AArch64SelectionDAGInfo.h
[SelectionDAG] Wire up -gen-sdnode-info TableGen backend (#125358)
2025-04-06 13:14:37 +03:00
AArch64SIMDInstrOpt.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64SLSHardening.cpp
[aarch64][win] Update Called Globals info when updating Call Site info (#122762)
2025-01-13 14:00:31 -08:00
AArch64SMEInstrInfo.td
[Clang][llvm] Implement fp8 FMOP4A intrinsics (#130127)
2025-04-23 14:10:13 +01:00
AArch64SpeculationHardening.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64StackTagging.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64StackTaggingPreRA.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64StorePairSuppress.cpp
[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)
2025-04-07 10:24:27 -07:00
AArch64Subtarget.cpp
[AARCH64] Add support for Cortex-A320 (#139055)
2025-05-09 16:24:48 +01:00
AArch64Subtarget.h
Reapply "[AArch64][SVE] Improve fixed-length addressing modes. (#129732)" (#130625)
2025-03-19 08:25:37 +00:00
AArch64SVEInstrInfo.td
[AArch64] Prefer using DUP instead of INS where possible (#138549)
2025-05-15 10:31:09 +02:00
AArch64SystemOperands.td
[AArch64] Add DC CIGDPAPA and DC CIPAPA instructions (#122718)
2025-01-14 08:35:36 +00:00
AArch64TargetMachine.cpp
Register assembly printer passes (#138348)
2025-05-06 18:01:17 -07:00
AArch64TargetMachine.h
Revert "Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128…" (#128819)
2025-02-26 10:54:39 +05:30
AArch64TargetObjectFile.cpp
[AArch64] Transition from MCSymbolRefExpr::VariantKind constants
2025-04-04 19:57:24 -07:00
AArch64TargetObjectFile.h
[AArch64] Transition from MCSymbolRefExpr::VariantKind constants
2025-04-04 19:57:24 -07:00
AArch64TargetTransformInfo.cpp
Reland "[AArch64][SME] Split SMECallAttrs out of SMEAttrs" (#138671)
2025-05-15 08:37:08 +01:00
AArch64TargetTransformInfo.h
[TTI][LV] Simplify the prototype of preferPredicatedReductionSelect. nfc (#139265)
2025-05-12 17:24:37 +08:00
CMakeLists.txt
[LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (#136456)
2025-04-21 08:15:08 -07:00
SMEABIPass.cpp
[NFC][AArch64] Final Cleanup Pass Initialization (#137744)
2025-04-29 10:59:05 -07:00
SMEInstrFormats.td
[AArch64] Add FPCR register usages to mop4 instructions (#135641)
2025-04-28 10:00:07 +01:00
SMEPeepholeOpt.cpp
[NFC][AArch64] Final Cleanup Pass Initialization (#137744)
2025-04-29 10:59:05 -07:00
SVEInstrFormats.td
[LLVM][AArch64][SVE] Mark DUP immediate instructions with isAsCheapAsAMove. (#133945)
2025-04-03 11:42:07 +01:00
SVEIntrinsicOpts.cpp
[NFC][AArch64] Final Cleanup Pass Initialization (#137744)
2025-04-29 10:59:05 -07:00