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llvm-project/mlir/test/Transforms
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Nicolas Vasilache 9e7e297da3 Lower vector transfer ops to loop.for operations. 
This allows mixing linalg operations with vector transfer operations (with additional modifications to affine ops) and is a step towards solving tensorflow/mlir#189.

PiperOrigin-RevId: 275543361
2019-10-18 14:10:10 -07:00
..
Vectorize
Lower vector transfer ops to loop.for operations.
2019-10-18 14:10:10 -07:00
affine-data-copy.mlir
Fix affine data copy generation corner cases/bugs
2019-09-03 11:53:16 -07:00
affine-loop-invariant-code-motion.mlir
Implement simple loop-invariant-code-motion based on dialect interfaces.
2019-10-16 04:28:38 -07:00
canonicalize.mlir
Add rewrite pattern to compose maps into affine load/stores
2019-09-17 11:49:45 -07:00
constant-fold.mlir
Introduce splat op + provide its LLVM lowering
2019-09-24 12:44:58 -07:00
cse.mlir
Standardize the value numbering in the AsmPrinter.
2019-07-09 10:41:00 -07:00
dma-generate.mlir
Extend map canonicalization to propagate constant operands
2019-08-29 01:13:29 -07:00
inlining.mlir
Add support for canonicalizing callable regions during inlining.
2019-10-10 17:06:33 -07:00
loop-coalescing.mlir
Introduce loop coalescing utility and a simple pass
2019-07-16 13:43:44 -07:00
loop-fusion-dependence-check.mlir
Globally change load/store/dma_start/dma_wait operations over to affine.load/store/dma_start/dma_wait.
2019-07-03 14:37:06 -07:00
loop-fusion-slice-computation.mlir
Extend map canonicalization to propagate constant operands
2019-08-29 01:13:29 -07:00
loop-fusion.mlir
Add support for some multi-store cases in affine fusion
2019-10-09 10:37:30 -07:00
loop-invariant-code-motion.mlir
Implement simple loop-invariant-code-motion based on dialect interfaces.
2019-10-16 04:28:38 -07:00
loop-tiling.mlir
Standardize the value numbering in the AsmPrinter.
2019-07-09 10:41:00 -07:00
lower-affine.mlir
Lower affine control flow to std control flow to LLVM dialect
2019-07-12 08:44:28 -07:00
memref-bound-check.mlir
Standardize the value numbering in the AsmPrinter.
2019-07-09 10:41:00 -07:00
memref-dataflow-opt.mlir
Upgrade/fix/simplify store to load forwarding
2019-09-21 10:08:56 -07:00
memref-dependence-check.mlir
Globally change load/store/dma_start/dma_wait operations over to affine.load/store/dma_start/dma_wait.
2019-07-03 14:37:06 -07:00
memref-normalize.mlir
fix simplify-affine-structures bug
2019-10-07 10:04:50 -07:00
parallelism-detection.mlir
Affine loop parallelism detection: conservatively handle unknown ops
2019-07-23 10:18:46 -07:00
parametric-mapping.mlir
Utility function to map a loop on a parametric grid of virtual processors
2019-07-19 11:40:31 -07:00
parametric-tiling.mlir
Add Instance Specific Pass Options.
2019-10-08 18:23:43 -07:00
pipeline-data-transfer.mlir
pipeline-data-transfer: remove dead tag alloc's and improve test coverage for replaceMemRefUsesWith / pipeline-data-transfer
2019-09-04 06:59:09 -07:00
simplify-affine-structures.mlir
Standardize the value numbering in the AsmPrinter.
2019-07-09 10:41:00 -07:00
slicing-utils.mlir
Fix backward slice corner case
2019-07-26 03:49:17 -07:00
strip-debuginfo.mlir
Replace the implementation of Function and Module with FuncOp and ModuleOp.
2019-07-03 14:37:18 -07:00
test-canonicalize.mlir
Add test for fix to tablegen for custom folders for ops that return a single
2019-10-09 20:44:30 -07:00
test-inlining.mlir
Add the initial inlining infrastructure.
2019-09-05 12:24:13 -07:00
test-legalizer-analysis.mlir
Add support for multi-level value mapping to DialectConversion.
2019-09-16 10:38:19 -07:00
test-legalizer-full.mlir
Allowing replacing non-root operations in DialectConversion.
2019-10-14 10:01:59 -07:00
test-legalizer.mlir
Remove the need to convert operations in regions of operations that have been replaced.
2019-10-10 17:06:25 -07:00
unroll-jam.mlir
unroll and jam: fix order of jammed bodies
2019-10-08 15:13:11 -07:00
unroll.mlir
Clean up build trip count analysis method - avoid mutating IR
2019-09-14 12:10:55 -07:00