8d7b50e572
This patch implements the `RandomGenerator`, a new input generator that enables conformance testing for functions with large input spaces (e.g., double-precision math functions). **Architectural Refactoring** To support different generation strategies in a clean and extensible way, the existing `ExhaustiveGenerator` was refactored into a new class hierarchy: * A new abstract base class, `RangeBasedGenerator`, was introduced using the Curiously Recurring Template Pattern (CRTP). It contains the common logic for generators that operate on a sequence of ranges. * `ExhaustiveGenerator` now inherits from this base class, simplifying its implementation. **New Components** * The new `RandomGenerator` class also inherits from `RangeBasedGenerator`. It implements a strategy that randomly samples a specified number of points from the total input space. * Random number generation is handled by a new, self-contained `RandomState` class (a `xorshift64*` PRNG seeded with `splitmix64`) to ensure deterministic and reproducible random streams for testing. **Example Usage** As a first use case and demonstration of this new capability, this patch also adds the first double-precision conformance test for the `log` function. This test uses the new `RandomGenerator` to validate the implementations from the `llvm-libm`, `cuda-math`, and `hip-math` providers.
116 lines
3.4 KiB
C++
116 lines
3.4 KiB
C++
//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file contains platform-specific definitions and forward declarations
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/// for device-side APIs used by the kernels.
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///
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//===----------------------------------------------------------------------===//
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#ifndef CONFORMANCE_DEVICE_CODE_DEVICEAPIS_HPP
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#define CONFORMANCE_DEVICE_CODE_DEVICEAPIS_HPP
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#include <stdint.h>
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typedef _Float16 float16;
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#ifdef __AMDGPU__
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// The ROCm device library uses control globals to alter codegen for the
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// different targets. To avoid needing to link them in manually, we simply
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// define them here.
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extern "C" {
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extern const inline uint8_t __oclc_unsafe_math_opt = 0;
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extern const inline uint8_t __oclc_daz_opt = 0;
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extern const inline uint8_t __oclc_correctly_rounded_sqrt32 = 1;
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extern const inline uint8_t __oclc_finite_only_opt = 0;
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extern const inline uint32_t __oclc_ISA_version = 9000;
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}
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// These aliases cause Clang to emit the control constants with ODR linkage.
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// This allows us to link against the symbols without preventing them from being
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// optimized out or causing symbol collisions.
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[[gnu::alias("__oclc_unsafe_math_opt")]] const uint8_t __oclc_unsafe_math_opt__;
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[[gnu::alias("__oclc_daz_opt")]] const uint8_t __oclc_daz_opt__;
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[[gnu::alias("__oclc_correctly_rounded_sqrt32")]] const uint8_t
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__oclc_correctly_rounded_sqrt32__;
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[[gnu::alias("__oclc_finite_only_opt")]] const uint8_t __oclc_finite_only_opt__;
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[[gnu::alias("__oclc_ISA_version")]] const uint32_t __oclc_ISA_version__;
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#endif // __AMDGPU__
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#ifdef CUDA_MATH_FOUND
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extern "C" {
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float __nv_acosf(float);
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float __nv_acoshf(float);
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float __nv_asinf(float);
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float __nv_asinhf(float);
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float __nv_atanf(float);
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float __nv_atanhf(float);
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float __nv_cbrtf(float);
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float __nv_cosf(float);
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float __nv_coshf(float);
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float __nv_cospif(float);
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float __nv_erff(float);
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float __nv_expf(float);
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float __nv_exp10f(float);
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float __nv_exp2f(float);
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float __nv_expm1f(float);
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double __nv_log(double);
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float __nv_logf(float);
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float __nv_log10f(float);
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float __nv_log1pf(float);
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float __nv_log2f(float);
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float __nv_sinf(float);
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void __nv_sincosf(float, float *, float *);
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float __nv_sinhf(float);
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float __nv_sinpif(float);
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float __nv_tanf(float);
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float __nv_tanhf(float);
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} // extern "C"
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#endif // CUDA_MATH_FOUND
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#ifdef HIP_MATH_FOUND
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extern "C" {
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float __ocml_acos_f32(float);
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float __ocml_acosh_f32(float);
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float __ocml_asin_f32(float);
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float __ocml_asinh_f32(float);
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float __ocml_atan_f32(float);
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float __ocml_atanh_f32(float);
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float __ocml_cbrt_f32(float);
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float __ocml_cos_f32(float);
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float __ocml_cosh_f32(float);
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float __ocml_cospi_f32(float);
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float __ocml_erf_f32(float);
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float __ocml_exp_f32(float);
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float __ocml_exp10_f32(float);
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float __ocml_exp2_f32(float);
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float __ocml_expm1_f32(float);
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double __ocml_log_f64(double);
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float __ocml_log_f32(float);
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float __ocml_log10_f32(float);
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float __ocml_log1p_f32(float);
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float __ocml_log2_f32(float);
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float __ocml_sin_f32(float);
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float __ocml_sincos_f32(float, float *);
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float __ocml_sinh_f32(float);
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float __ocml_sinpi_f32(float);
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float __ocml_tan_f32(float);
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float __ocml_tanh_f32(float);
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} // extern "C"
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#endif // HIP_MATH_FOUND
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#endif // CONFORMANCE_DEVICE_CODE_DEVICEAPIS_HPP
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