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llvm-project/llvm/test/CodeGen
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Pengfei Wang 8d7ccb3744 Set the floating point status register as reserved 
Summary:
This patch sets the FPSW (X87 floating-point status register) as a reserved
physical register and fix the test failure caused by [[ https://reviews.llvm.org/D68854| D68854 ]].

Before this patch, some tests will fail because it implicit uses FPSW without
define it. Setting the FPSW as a reserved physical register will skip liveness
analysis because it is always live.

Reviewers: pengfei, craig.topper

Reviewed By: craig.topper

Subscribers: craig.topper, hiraditya, llvm-commits

Patch by LiuChen.

Differential Revision: https://reviews.llvm.org/D69784
2019-11-03 23:14:34 -08:00
..
AArch64
Revert "[AArch64][MachineOutliner] Return address signing for outlined functions"
2019-11-01 16:06:09 +00:00
AMDGPU
[amdgpu] Fix known bits compuation on MUL_I24/MUL_U24.
2019-11-01 17:06:17 -04:00
ARC
…
ARM
[cfi] Add flag to always generate .debug_frame
2019-10-31 09:48:30 +00:00
AVR
[AVR] Fix tests after r363757
2019-07-04 06:12:47 +00:00
BPF
[BPF] fix a bug in __builtin_preserve_field_info() with FIELD_BYTE_SIZE
2019-11-03 08:18:28 -08:00
Generic
[CodeGen] [ExpandReduction] Fix the bug for ExpandReduction() when vector size isn't power of 2
2019-11-02 23:59:12 -04:00
Hexagon
Fix pattern error for S2_tstbit_i instruction
2019-10-30 11:21:48 -05:00
Inputs
[CodeGen] Add stack protector tests where the guard gets re-assigned
2019-07-17 20:46:16 +00:00
Lanai
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
Mips
[utils] Reflow asm check generation to tolerate blank lines
2019-11-01 09:42:48 +03:00
MIR
AMDGPU: Add default denormal mode to MachineFunctionInfo
2019-11-01 00:03:39 -07:00
MSP430
[MSP430] fix typo in test name; NFC
2019-10-30 14:15:25 -04:00
NVPTX
[NVPTX] Added llvm.nvvm.mma.m8n8k4.* intrinsics
2019-10-28 13:55:30 -07:00
PowerPC
[LDV][RAGreedy] Inform LiveDebugVariables about new VRegs added by InlineSpiller
2019-11-01 16:25:32 +01:00
RISCV
[RISCV] Remove RA from reserved register to use as callee saved register
2019-10-29 11:32:16 +08:00
SPARC
[test] Fix tests when run on windows after SVN r369426. NFC.
2019-08-20 20:58:02 +00:00
SystemZ
[FPEnv] Strict FP tests should use the requisite function attributes.
2019-10-04 17:03:46 +00:00
Thumb
(Re)generate various tests. NFC
2019-10-08 16:16:26 +00:00
Thumb2
[InstCombine] Known-bits optimization for ARM MVE VADC.
2019-10-24 16:33:13 +01:00
WebAssembly
[WebAssembly] Add experimental SIMD dot product instruction
2019-11-01 10:45:48 -07:00
WinCFGuard
[WinCFG] Handle constant casts carefully in .gfids emission
2019-11-01 13:32:03 -07:00
WinEH
[Windows] Replace TrapUnreachable with an int3 insertion pass
2019-09-09 23:04:25 +00:00
X86
Set the floating point status register as reserved
2019-11-03 23:14:34 -08:00
XCore
…