174 lines
8.4 KiB
LLVM
174 lines
8.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 5
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; RUN: opt %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s --check-prefixes=NORMAL,BASELINE
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; RUN: opt %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S -bonus-inst-threshold=2 | FileCheck %s --check-prefixes=NORMAL,AGGRESSIVE
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; RUN: opt %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S -bonus-inst-threshold=4 | FileCheck %s --check-prefixes=WAYAGGRESSIVE
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; RUN: opt %s -passes=simplifycfg -S | FileCheck %s --check-prefixes=NORMAL,BASELINE
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; RUN: opt %s -passes="simplifycfg<bonus-inst-threshold=2>" -S | FileCheck %s --check-prefixes=NORMAL,AGGRESSIVE
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; RUN: opt %s -passes="simplifycfg<bonus-inst-threshold=4>" -S | FileCheck %s --check-prefixes=WAYAGGRESSIVE
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define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) {
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; BASELINE-LABEL: define i32 @foo(
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; BASELINE-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], ptr [[INPUT:%.*]]) {
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; BASELINE-NEXT: [[ENTRY:.*]]:
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; BASELINE-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D]], 3
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; BASELINE-NEXT: br i1 [[CMP]], label %[[COND_END:.*]], label %[[LOR_LHS_FALSE:.*]], !prof [[PROF0:![0-9]+]]
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; BASELINE: [[LOR_LHS_FALSE]]:
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; BASELINE-NEXT: [[MUL:%.*]] = shl i32 [[C]], 1
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; BASELINE-NEXT: [[ADD:%.*]] = add nsw i32 [[MUL]], [[A]]
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; BASELINE-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B]]
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; BASELINE-NEXT: br i1 [[CMP1]], label %[[COND_FALSE:.*]], label %[[COND_END]], !prof [[PROF1:![0-9]+]]
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; BASELINE: [[COND_FALSE]]:
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; BASELINE-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT]], align 4
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; BASELINE-NEXT: br label %[[COND_END]]
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; BASELINE: [[COND_END]]:
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; BASELINE-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], %[[COND_FALSE]] ], [ 0, %[[LOR_LHS_FALSE]] ], [ 0, %[[ENTRY]] ]
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; BASELINE-NEXT: ret i32 [[COND]]
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;
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; AGGRESSIVE-LABEL: define i32 @foo(
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; AGGRESSIVE-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], ptr [[INPUT:%.*]]) {
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; AGGRESSIVE-NEXT: [[ENTRY:.*]]:
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; AGGRESSIVE-NEXT: [[CMP:%.*]] = icmp sle i32 [[D]], 3
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; AGGRESSIVE-NEXT: [[MUL:%.*]] = shl i32 [[C]], 1
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; AGGRESSIVE-NEXT: [[ADD:%.*]] = add nsw i32 [[MUL]], [[A]]
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; AGGRESSIVE-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B]]
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; AGGRESSIVE-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false, !prof [[PROF0:![0-9]+]]
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; AGGRESSIVE-NEXT: br i1 [[OR_COND]], label %[[COND_FALSE:.*]], label %[[COND_END:.*]], !prof [[PROF0]]
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; AGGRESSIVE: [[COND_FALSE]]:
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; AGGRESSIVE-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT]], align 4
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; AGGRESSIVE-NEXT: br label %[[COND_END]]
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; AGGRESSIVE: [[COND_END]]:
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; AGGRESSIVE-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], %[[COND_FALSE]] ], [ 0, %[[ENTRY]] ]
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; AGGRESSIVE-NEXT: ret i32 [[COND]]
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;
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; WAYAGGRESSIVE-LABEL: define i32 @foo(
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; WAYAGGRESSIVE-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], ptr [[INPUT:%.*]]) {
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; WAYAGGRESSIVE-NEXT: [[ENTRY:.*]]:
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; WAYAGGRESSIVE-NEXT: [[CMP:%.*]] = icmp sle i32 [[D]], 3
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; WAYAGGRESSIVE-NEXT: [[MUL:%.*]] = shl i32 [[C]], 1
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; WAYAGGRESSIVE-NEXT: [[ADD:%.*]] = add nsw i32 [[MUL]], [[A]]
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; WAYAGGRESSIVE-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B]]
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; WAYAGGRESSIVE-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false, !prof [[PROF0:![0-9]+]]
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; WAYAGGRESSIVE-NEXT: br i1 [[OR_COND]], label %[[COND_FALSE:.*]], label %[[COND_END:.*]], !prof [[PROF0]]
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; WAYAGGRESSIVE: [[COND_FALSE]]:
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; WAYAGGRESSIVE-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT]], align 4
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; WAYAGGRESSIVE-NEXT: br label %[[COND_END]]
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; WAYAGGRESSIVE: [[COND_END]]:
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; WAYAGGRESSIVE-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], %[[COND_FALSE]] ], [ 0, %[[ENTRY]] ]
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; WAYAGGRESSIVE-NEXT: ret i32 [[COND]]
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;
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entry:
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%cmp = icmp sgt i32 %d, 3
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br i1 %cmp, label %cond.end, label %lor.lhs.false, !prof !0
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lor.lhs.false:
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%mul = shl i32 %c, 1
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%add = add nsw i32 %mul, %a
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%cmp1 = icmp slt i32 %add, %b
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br i1 %cmp1, label %cond.false, label %cond.end, !prof !1
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cond.false:
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%0 = load i32, ptr %input, align 4
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br label %cond.end
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cond.end:
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%cond = phi i32 [ %0, %cond.false ], [ 0, %lor.lhs.false ], [ 0, %entry ]
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ret i32 %cond
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}
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declare void @distinct_a();
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declare void @distinct_b();
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;; Like foo, but have to duplicate into multiple predecessors
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define i32 @bar(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) {
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; NORMAL-LABEL: define i32 @bar(
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; NORMAL-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], ptr [[INPUT:%.*]]) {
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; NORMAL-NEXT: [[ENTRY:.*:]]
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; NORMAL-NEXT: [[CMP_SPLIT:%.*]] = icmp slt i32 [[D]], [[B]]
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; NORMAL-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D]], 3
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; NORMAL-NEXT: br i1 [[CMP_SPLIT]], label %[[PRED_A:.*]], label %[[PRED_B:.*]]
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; NORMAL: [[PRED_A]]:
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; NORMAL-NEXT: call void @distinct_a()
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; NORMAL-NEXT: br i1 [[CMP]], label %[[COND_END:.*]], label %[[LOR_LHS_FALSE:.*]]
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; NORMAL: [[PRED_B]]:
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; NORMAL-NEXT: call void @distinct_b()
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; NORMAL-NEXT: br i1 [[CMP]], label %[[COND_END]], label %[[LOR_LHS_FALSE]]
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; NORMAL: [[LOR_LHS_FALSE]]:
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; NORMAL-NEXT: [[MUL:%.*]] = shl i32 [[C]], 1
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; NORMAL-NEXT: [[ADD:%.*]] = add nsw i32 [[MUL]], [[A]]
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; NORMAL-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B]]
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; NORMAL-NEXT: br i1 [[CMP1]], label %[[COND_FALSE:.*]], label %[[COND_END]]
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; NORMAL: [[COND_FALSE]]:
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; NORMAL-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT]], align 4
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; NORMAL-NEXT: br label %[[COND_END]]
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; NORMAL: [[COND_END]]:
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; NORMAL-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], %[[COND_FALSE]] ], [ 0, %[[LOR_LHS_FALSE]] ], [ 0, %[[PRED_A]] ], [ 0, %[[PRED_B]] ]
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; NORMAL-NEXT: ret i32 [[COND]]
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;
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; WAYAGGRESSIVE-LABEL: define i32 @bar(
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; WAYAGGRESSIVE-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], ptr [[INPUT:%.*]]) {
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; WAYAGGRESSIVE-NEXT: [[ENTRY:.*:]]
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; WAYAGGRESSIVE-NEXT: [[CMP_SPLIT:%.*]] = icmp slt i32 [[D]], [[B]]
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; WAYAGGRESSIVE-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D]], 3
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; WAYAGGRESSIVE-NEXT: br i1 [[CMP_SPLIT]], label %[[PRED_A:.*]], label %[[PRED_B:.*]]
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; WAYAGGRESSIVE: [[PRED_A]]:
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; WAYAGGRESSIVE-NEXT: call void @distinct_a()
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; WAYAGGRESSIVE-NEXT: [[CMP_NOT1:%.*]] = xor i1 [[CMP]], true
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; WAYAGGRESSIVE-NEXT: [[MUL_OLD:%.*]] = shl i32 [[C]], 1
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; WAYAGGRESSIVE-NEXT: [[ADD_OLD:%.*]] = add nsw i32 [[MUL_OLD]], [[A]]
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; WAYAGGRESSIVE-NEXT: [[CMP1_OLD:%.*]] = icmp slt i32 [[ADD_OLD]], [[B]]
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; WAYAGGRESSIVE-NEXT: [[OR_COND2:%.*]] = select i1 [[CMP_NOT1]], i1 [[CMP1_OLD]], i1 false
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; WAYAGGRESSIVE-NEXT: br i1 [[OR_COND2]], label %[[COND_FALSE:.*]], label %[[COND_END:.*]]
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; WAYAGGRESSIVE: [[PRED_B]]:
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; WAYAGGRESSIVE-NEXT: call void @distinct_b()
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; WAYAGGRESSIVE-NEXT: [[CMP_NOT:%.*]] = xor i1 [[CMP]], true
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; WAYAGGRESSIVE-NEXT: [[MUL:%.*]] = shl i32 [[C]], 1
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; WAYAGGRESSIVE-NEXT: [[ADD:%.*]] = add nsw i32 [[MUL]], [[A]]
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; WAYAGGRESSIVE-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B]]
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; WAYAGGRESSIVE-NEXT: [[OR_COND:%.*]] = select i1 [[CMP_NOT]], i1 [[CMP1]], i1 false
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; WAYAGGRESSIVE-NEXT: br i1 [[OR_COND]], label %[[COND_FALSE]], label %[[COND_END]]
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; WAYAGGRESSIVE: [[COND_FALSE]]:
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; WAYAGGRESSIVE-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT]], align 4
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; WAYAGGRESSIVE-NEXT: br label %[[COND_END]]
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; WAYAGGRESSIVE: [[COND_END]]:
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; WAYAGGRESSIVE-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], %[[COND_FALSE]] ], [ 0, %[[PRED_A]] ], [ 0, %[[PRED_B]] ]
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; WAYAGGRESSIVE-NEXT: ret i32 [[COND]]
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;
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entry:
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%cmp_split = icmp slt i32 %d, %b
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%cmp = icmp sgt i32 %d, 3
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br i1 %cmp_split, label %pred_a, label %pred_b
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pred_a:
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call void @distinct_a();
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br i1 %cmp, label %cond.end, label %lor.lhs.false
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pred_b:
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call void @distinct_b();
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br i1 %cmp, label %cond.end, label %lor.lhs.false
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lor.lhs.false:
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%mul = shl i32 %c, 1
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%add = add nsw i32 %mul, %a
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%cmp1 = icmp slt i32 %add, %b
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br i1 %cmp1, label %cond.false, label %cond.end
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cond.false:
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%0 = load i32, ptr %input, align 4
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br label %cond.end
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cond.end:
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%cond = phi i32 [ %0, %cond.false ], [ 0, %lor.lhs.false ],[ 0, %pred_a ],[ 0, %pred_b ]
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ret i32 %cond
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}
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!0 = !{!"branch_weights", i32 7, i32 11}
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!1 = !{!"branch_weights", i32 13, i32 5}
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;.
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; BASELINE: [[PROF0]] = !{!"branch_weights", i32 7, i32 11}
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; BASELINE: [[PROF1]] = !{!"branch_weights", i32 13, i32 5}
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;.
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; AGGRESSIVE: [[PROF0]] = !{!"branch_weights", i32 143, i32 181}
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;.
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; WAYAGGRESSIVE: [[PROF0]] = !{!"branch_weights", i32 143, i32 181}
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;.
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