c999e9a4fe
- Make v8f16 a legal type so that arguments can be passed in vector registers. Handle fp16 vectors so that they have the same ABI as other fp vectors. - Set the preferred vector action for fp16 vectors to "split". This will scalarize all operations, which is not always necessary (like with memory operations), but it avoids the superfluous operations that result after first widening and then scalarizing a narrow vector (like v4f16). Fixes #168992
209 lines
6.3 KiB
LLVM
209 lines
6.3 KiB
LLVM
; Test vector splat.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; Test v16i8 splat of the first element.
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define <16 x i8> @f1(<16 x i8> %val) {
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; CHECK-LABEL: f1:
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; CHECK: vrepb %v24, %v24, 0
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; CHECK: br %r14
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%ret = shufflevector <16 x i8> %val, <16 x i8> undef,
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<16 x i32> zeroinitializer
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ret <16 x i8> %ret
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}
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; Test v16i8 splat of the last element.
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define <16 x i8> @f2(<16 x i8> %val) {
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; CHECK-LABEL: f2:
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; CHECK: vrepb %v24, %v24, 15
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; CHECK: br %r14
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%ret = shufflevector <16 x i8> %val, <16 x i8> undef,
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<16 x i32> <i32 15, i32 15, i32 15, i32 15,
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i32 15, i32 15, i32 15, i32 15,
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i32 15, i32 15, i32 15, i32 15,
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i32 15, i32 15, i32 15, i32 15>
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ret <16 x i8> %ret
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}
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; Test v16i8 splat of an arbitrary element, using the second operand of
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; the shufflevector.
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define <16 x i8> @f3(<16 x i8> %val) {
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; CHECK-LABEL: f3:
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; CHECK: vrepb %v24, %v24, 4
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; CHECK: br %r14
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%ret = shufflevector <16 x i8> undef, <16 x i8> %val,
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<16 x i32> <i32 20, i32 20, i32 20, i32 20,
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i32 20, i32 20, i32 20, i32 20,
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i32 20, i32 20, i32 20, i32 20,
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i32 20, i32 20, i32 20, i32 20>
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ret <16 x i8> %ret
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}
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; Test v8i16 splat of the first element.
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define <8 x i16> @f4(<8 x i16> %val) {
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; CHECK-LABEL: f4:
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; CHECK: vreph %v24, %v24, 0
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; CHECK: br %r14
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%ret = shufflevector <8 x i16> %val, <8 x i16> undef,
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<8 x i32> zeroinitializer
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ret <8 x i16> %ret
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}
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; Test v8i16 splat of the last element.
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define <8 x i16> @f5(<8 x i16> %val) {
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; CHECK-LABEL: f5:
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; CHECK: vreph %v24, %v24, 7
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; CHECK: br %r14
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%ret = shufflevector <8 x i16> %val, <8 x i16> undef,
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<8 x i32> <i32 7, i32 7, i32 7, i32 7,
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i32 7, i32 7, i32 7, i32 7>
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ret <8 x i16> %ret
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}
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; Test v8i16 splat of an arbitrary element, using the second operand of
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; the shufflevector.
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define <8 x i16> @f6(<8 x i16> %val) {
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; CHECK-LABEL: f6:
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; CHECK: vreph %v24, %v24, 2
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; CHECK: br %r14
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%ret = shufflevector <8 x i16> undef, <8 x i16> %val,
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<8 x i32> <i32 10, i32 10, i32 10, i32 10,
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i32 10, i32 10, i32 10, i32 10>
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ret <8 x i16> %ret
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}
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; Test v4i32 splat of the first element.
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define <4 x i32> @f7(<4 x i32> %val) {
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; CHECK-LABEL: f7:
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; CHECK: vrepf %v24, %v24, 0
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; CHECK: br %r14
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%ret = shufflevector <4 x i32> %val, <4 x i32> undef,
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<4 x i32> zeroinitializer
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ret <4 x i32> %ret
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}
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; Test v4i32 splat of the last element.
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define <4 x i32> @f8(<4 x i32> %val) {
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; CHECK-LABEL: f8:
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; CHECK: vrepf %v24, %v24, 3
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; CHECK: br %r14
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%ret = shufflevector <4 x i32> %val, <4 x i32> undef,
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<4 x i32> <i32 3, i32 3, i32 3, i32 3>
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ret <4 x i32> %ret
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}
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; Test v4i32 splat of an arbitrary element, using the second operand of
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; the shufflevector.
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define <4 x i32> @f9(<4 x i32> %val) {
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; CHECK-LABEL: f9:
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; CHECK: vrepf %v24, %v24, 1
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; CHECK: br %r14
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%ret = shufflevector <4 x i32> undef, <4 x i32> %val,
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<4 x i32> <i32 5, i32 5, i32 5, i32 5>
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ret <4 x i32> %ret
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}
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; Test v2i64 splat of the first element.
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define <2 x i64> @f10(<2 x i64> %val) {
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; CHECK-LABEL: f10:
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; CHECK: vrepg %v24, %v24, 0
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; CHECK: br %r14
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%ret = shufflevector <2 x i64> %val, <2 x i64> undef,
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<2 x i32> zeroinitializer
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ret <2 x i64> %ret
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}
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; Test v2i64 splat of the last element.
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define <2 x i64> @f11(<2 x i64> %val) {
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; CHECK-LABEL: f11:
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; CHECK: vrepg %v24, %v24, 1
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; CHECK: br %r14
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%ret = shufflevector <2 x i64> %val, <2 x i64> undef,
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<2 x i32> <i32 1, i32 1>
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ret <2 x i64> %ret
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}
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; Test v8f16 splat of the first element.
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define <8 x half> @f12(<8 x half> %val) {
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; CHECK-LABEL: f12:
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; CHECK: vreph %v24, %v24, 0
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; CHECK: br %r14
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%ret = shufflevector <8 x half> %val, <8 x half> undef,
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<8 x i32> zeroinitializer
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ret <8 x half> %ret
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}
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; Test v8f16 splat of the last element.
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define <8 x half> @f13(<8 x half> %val) {
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; CHECK-LABEL: f13:
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; CHECK: vreph %v24, %v24, 7
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; CHECK: br %r14
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%ret = shufflevector <8 x half> %val, <8 x half> undef,
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<8 x i32> <i32 7, i32 7, i32 7, i32 7,
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i32 7, i32 7, i32 7, i32 7>
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ret <8 x half> %ret
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}
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; Test v8f16 splat of an arbitrary element, using the second operand of
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; the shufflevector.
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define <8 x half> @f14(<8 x half> %val) {
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; CHECK-LABEL: f14:
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; CHECK: vreph %v24, %v24, 2
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; CHECK: br %r14
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%ret = shufflevector <8 x half> undef, <8 x half> %val,
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<8 x i32> <i32 10, i32 10, i32 10, i32 10,
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i32 10, i32 10, i32 10, i32 10>
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ret <8 x half> %ret
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}
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; Test v4f32 splat of the first element.
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define <4 x float> @f15(<4 x float> %val) {
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; CHECK-LABEL: f15:
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; CHECK: vrepf %v24, %v24, 0
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; CHECK: br %r14
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%ret = shufflevector <4 x float> %val, <4 x float> undef,
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<4 x i32> zeroinitializer
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ret <4 x float> %ret
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}
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; Test v4f32 splat of the last element.
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define <4 x float> @f16(<4 x float> %val) {
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; CHECK-LABEL: f16:
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; CHECK: vrepf %v24, %v24, 3
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; CHECK: br %r14
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%ret = shufflevector <4 x float> %val, <4 x float> undef,
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<4 x i32> <i32 3, i32 3, i32 3, i32 3>
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ret <4 x float> %ret
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}
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; Test v4f32 splat of an arbitrary element, using the second operand of
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; the shufflevector.
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define <4 x float> @f17(<4 x float> %val) {
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; CHECK-LABEL: f17:
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; CHECK: vrepf %v24, %v24, 1
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; CHECK: br %r14
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%ret = shufflevector <4 x float> undef, <4 x float> %val,
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<4 x i32> <i32 5, i32 5, i32 5, i32 5>
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ret <4 x float> %ret
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}
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; Test v2f64 splat of the first element.
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define <2 x double> @f18(<2 x double> %val) {
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; CHECK-LABEL: f18:
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; CHECK: vrepg %v24, %v24, 0
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; CHECK: br %r14
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%ret = shufflevector <2 x double> %val, <2 x double> undef,
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<2 x i32> zeroinitializer
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ret <2 x double> %ret
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}
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; Test v2f64 splat of the last element.
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define <2 x double> @f19(<2 x double> %val) {
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; CHECK-LABEL: f19:
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; CHECK: vrepg %v24, %v24, 1
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; CHECK: br %r14
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%ret = shufflevector <2 x double> %val, <2 x double> undef,
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<2 x i32> <i32 1, i32 1>
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ret <2 x double> %ret
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}
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