4f58b1bd29
Second land attempt. MachineVerifier DefRegState expensive check errors fixed.
Prologs and epilogs handle callee-save registers and tend to be irregular with
different immediate offsets that are not often handled by the MachineOutliner.
Commit D18619/a5335647d5e8 (combining stack operations) stretched irregularity
further.
This patch tries to emit homogeneous stores and loads with the same offset for
prologs and epilogs respectively. We have observed that this canonicalizes
(homogenizes) prologs and epilogs significantly and results in a greatly
increased chance of outlining, resulting in a code size reduction.
Despite the above results, there are still size wins to be had that the
MachineOutliner does not provide due to the special handling X30/LR. To handle
the LR case, his patch custom-outlines prologs and epilogs in place. It does
this by doing the following:
* Injects HOM_Prolog and HOM_Epilog pseudo instructions during a Prolog and
Epilog Injection Pass.
* Lowers and optimizes said pseudos in a AArchLowerHomogneousPrologEpilog Pass.
* Outlined helpers are created on demand. Identical helpers are merged by the linker.
* An opt-in flag is introduced to enable this feature. Another threshold flag
is also introduced to control the aggressiveness of outlining for application's need.
This reduced an average of 4% of code size on LLVM-TestSuite/CTMark targeting arm64/-Oz.
Differential Revision: https://reviews.llvm.org/D76570
101 lines
4.4 KiB
C++
101 lines
4.4 KiB
C++
//==-- AArch64.h - Top-level interface for AArch64 --------------*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// AArch64 back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64_H
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#define LLVM_LIB_TARGET_AARCH64_AARCH64_H
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#include "MCTargetDesc/AArch64MCTargetDesc.h"
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#include "Utils/AArch64BaseInfo.h"
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#include "llvm/Support/DataTypes.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class AArch64RegisterBankInfo;
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class AArch64Subtarget;
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class AArch64TargetMachine;
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class FunctionPass;
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class InstructionSelector;
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class MachineFunctionPass;
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FunctionPass *createAArch64DeadRegisterDefinitions();
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FunctionPass *createAArch64RedundantCopyEliminationPass();
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FunctionPass *createAArch64CondBrTuning();
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FunctionPass *createAArch64CompressJumpTablesPass();
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FunctionPass *createAArch64ConditionalCompares();
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FunctionPass *createAArch64AdvSIMDScalar();
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FunctionPass *createAArch64ISelDag(AArch64TargetMachine &TM,
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CodeGenOpt::Level OptLevel);
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FunctionPass *createAArch64StorePairSuppressPass();
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FunctionPass *createAArch64ExpandPseudoPass();
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FunctionPass *createAArch64SLSHardeningPass();
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FunctionPass *createAArch64IndirectThunks();
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FunctionPass *createAArch64SpeculationHardeningPass();
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FunctionPass *createAArch64LoadStoreOptimizationPass();
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ModulePass *createAArch64LowerHomogeneousPrologEpilogPass();
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FunctionPass *createAArch64SIMDInstrOptPass();
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ModulePass *createAArch64PromoteConstantPass();
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FunctionPass *createAArch64ConditionOptimizerPass();
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FunctionPass *createAArch64A57FPLoadBalancing();
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FunctionPass *createAArch64A53Fix835769();
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FunctionPass *createFalkorHWPFFixPass();
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FunctionPass *createFalkorMarkStridedAccessesPass();
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FunctionPass *createAArch64BranchTargetsPass();
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FunctionPass *createAArch64CleanupLocalDynamicTLSPass();
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FunctionPass *createAArch64CollectLOHPass();
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ModulePass *createSVEIntrinsicOptsPass();
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InstructionSelector *
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createAArch64InstructionSelector(const AArch64TargetMachine &,
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AArch64Subtarget &, AArch64RegisterBankInfo &);
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FunctionPass *createAArch64PreLegalizerCombiner(bool IsOptNone);
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FunctionPass *createAArch64PostLegalizerCombiner(bool IsOptNone);
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FunctionPass *createAArch64PostLegalizerLowering();
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FunctionPass *createAArch64PostSelectOptimize();
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FunctionPass *createAArch64StackTaggingPass(bool IsOptNone);
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FunctionPass *createAArch64StackTaggingPreRAPass();
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void initializeAArch64A53Fix835769Pass(PassRegistry&);
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void initializeAArch64A57FPLoadBalancingPass(PassRegistry&);
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void initializeAArch64AdvSIMDScalarPass(PassRegistry&);
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void initializeAArch64BranchTargetsPass(PassRegistry&);
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void initializeAArch64CollectLOHPass(PassRegistry&);
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void initializeAArch64CondBrTuningPass(PassRegistry &);
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void initializeAArch64CompressJumpTablesPass(PassRegistry&);
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void initializeAArch64ConditionalComparesPass(PassRegistry&);
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void initializeAArch64ConditionOptimizerPass(PassRegistry&);
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void initializeAArch64DeadRegisterDefinitionsPass(PassRegistry&);
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void initializeAArch64ExpandPseudoPass(PassRegistry&);
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void initializeAArch64SLSHardeningPass(PassRegistry&);
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void initializeAArch64SpeculationHardeningPass(PassRegistry&);
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void initializeAArch64LoadStoreOptPass(PassRegistry&);
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void initializeAArch64LowerHomogeneousPrologEpilogPass(PassRegistry &);
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void initializeAArch64SIMDInstrOptPass(PassRegistry&);
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void initializeAArch64PreLegalizerCombinerPass(PassRegistry&);
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void initializeAArch64PostLegalizerCombinerPass(PassRegistry &);
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void initializeAArch64PostLegalizerLoweringPass(PassRegistry &);
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void initializeAArch64PostSelectOptimizePass(PassRegistry &);
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void initializeAArch64PromoteConstantPass(PassRegistry&);
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void initializeAArch64RedundantCopyEliminationPass(PassRegistry&);
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void initializeAArch64StorePairSuppressPass(PassRegistry&);
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void initializeFalkorHWPFFixPass(PassRegistry&);
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void initializeFalkorMarkStridedAccessesLegacyPass(PassRegistry&);
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void initializeLDTLSCleanupPass(PassRegistry&);
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void initializeSVEIntrinsicOptsPass(PassRegistry&);
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void initializeAArch64StackTaggingPass(PassRegistry&);
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void initializeAArch64StackTaggingPreRAPass(PassRegistry&);
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} // end namespace llvm
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#endif
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