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llvm-project/llvm/lib/Target/AArch64
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Petr Hosek 16af973933 [MC][ELF] Support for zero flag section groups 
This change introduces support for zero flag ELF section groups to LLVM.
LLVM already supports COMDAT sections, which in ELF are a special type
of ELF section groups. These are generally useful to enable linker GC
where you want a group of sections to always travel together, that is to
be either retained or discarded as a whole, but without the COMDAT
semantics. Other ELF assemblers already support zero flag ELF section
groups and this change helps us reach feature parity.

Differential Revision: https://reviews.llvm.org/D95851
2021-02-16 14:23:40 -08:00
..
AsmParser
[AArch64AsmParser] Fix type-limits warning for VectorIndex.
2021-02-08 15:35:30 +00:00
Disassembler
[AArch64] Adding the v8.7-A LD64B/ST64B Accelerator extension
2020-12-17 13:46:23 +00:00
GISel
Revert "[AArch64][GlobalISel] Fold constants into G_GLOBAL_VALUE"
2021-02-16 10:50:12 -08:00
MCTargetDesc
[AArch64][SVE] Asm: Fix supported immediates for DUP/CPY
2021-02-11 08:14:15 +00:00
TargetInfo
llvmbuildectomy - replace llvm-build by plain cmake
2020-11-13 10:35:24 +01:00
Utils
[ARM][AArch64] Adding basic support for the v8.7-A architecture
2020-12-17 13:45:08 +00:00
AArch64.h
[AArch64] Homogeneous Prolog and Epilog Size Optimization
2021-02-02 14:57:26 -08:00
AArch64.td
[AArch64] Add Cortex CPU subtarget features for instruction fusion.
2021-01-25 09:11:29 +00:00
AArch64A53Fix835769.cpp
…
AArch64A57FPLoadBalancing.cpp
…
AArch64AdvSIMDScalarPass.cpp
[AArch64] Update a code comment incorrectly referring to zero_reg. NFC
2020-08-20 14:36:59 +02:00
AArch64AsmPrinter.cpp
[MC][ELF] Support for zero flag section groups
2021-02-16 14:23:40 -08:00
AArch64BranchTargets.cpp
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
AArch64CallingConvention.cpp
[SVE] Deal with SVE tuple call arguments correctly when running out of registers
2020-11-12 08:41:50 +00:00
AArch64CallingConvention.h
…
AArch64CallingConvention.td
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AArch64CleanupLocalDynamicTLSPass.cpp
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AArch64CollectLOH.cpp
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AArch64Combine.td
Revert "[AArch64][GlobalISel] Fold constants into G_GLOBAL_VALUE"
2021-02-16 10:50:12 -08:00
AArch64CompressJumpTables.cpp
[AArch64] Don't try to compress jump tables if there are any inline asm instructions.
2020-12-10 12:20:02 -08:00
AArch64CondBrTuning.cpp
…
AArch64ConditionalCompares.cpp
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AArch64ConditionOptimizer.cpp
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AArch64DeadRegisterDefinitionsPass.cpp
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AArch64ExpandImm.cpp
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AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
AArch64: use a constpool for blockaddress(...) on MachO
2021-02-08 15:13:29 +00:00
AArch64FalkorHWPFFix.cpp
Small fixes for "[LoopInfo] empty() -> isInnermost(), add isOutermost()"
2020-09-22 23:59:34 +03:00
AArch64FastISel.cpp
[CodeGen][SelectionDAG]Add new intrinsic experimental.vector.reverse
2021-02-15 13:39:43 +00:00
AArch64FrameLowering.cpp
[AArch64] Homogeneous Prolog and Epilog Size Optimization
2021-02-02 14:57:26 -08:00
AArch64FrameLowering.h
[AArch64] Homogeneous Prolog and Epilog Size Optimization
2021-02-02 14:57:26 -08:00
AArch64GenRegisterBankInfo.def
…
AArch64InstrAtomics.td
…
AArch64InstrFormats.td
[AArch64] Adding Neon Sm3 & Sm4 Intrinsics
2021-02-11 14:20:20 -08:00
AArch64InstrGISel.td
[AArch64][GlobalISel] Add selection support for fpr bank source variants of G_SITOFP and G_UITOFP.
2021-01-14 19:31:19 -08:00
AArch64InstrInfo.cpp
[GlobalISel] Propagate extends through G_PHIs into the incoming value blocks.
2021-02-12 11:52:52 -08:00
AArch64InstrInfo.h
[GlobalISel] Propagate extends through G_PHIs into the incoming value blocks.
2021-02-12 11:52:52 -08:00
AArch64InstrInfo.td
[AArch64] Adding Neon Sm3 & Sm4 Intrinsics
2021-02-11 14:20:20 -08:00
AArch64ISelDAGToDAG.cpp
[AArch64] Adding ACLE intrinsics for the LS64 extension
2021-01-14 09:43:58 +00:00
AArch64ISelLowering.cpp
[AArch64] Convert CMP/SELECT sign patterns to OR & ASR.
2021-02-16 17:17:34 +00:00
AArch64ISelLowering.h
[CodeGen][SelectionDAG]Add new intrinsic experimental.vector.reverse
2021-02-15 13:39:43 +00:00
AArch64LoadStoreOptimizer.cpp
[AArch64] Don't merge sp decrement into later stores when using WinCFI
2020-10-01 19:03:27 +03:00
AArch64LowerHomogeneousPrologEpilog.cpp
AArch64LowerHomogeneousPrologEpilog.cpp - fix Wdocumentation warning. NFCI.
2021-02-05 11:34:43 +00:00
AArch64MachineFunctionInfo.cpp
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
AArch64MachineFunctionInfo.h
[AArch64][SVE] Allow accesses to SVE stack objects to use frame pointer
2021-01-28 12:39:57 +00:00
AArch64MacroFusion.cpp
[AArch64] Add Cortex CPU subtarget features for instruction fusion.
2021-01-25 09:11:29 +00:00
AArch64MacroFusion.h
[llvm] Add missing header guards (NFC)
2021-01-30 09:53:42 -08:00
AArch64MCInstLower.cpp
[AArch64] [Windows] Properly add :lo12: reloc specifiers when generating assembly
2021-01-12 23:56:03 +02:00
AArch64MCInstLower.h
…
AArch64PBQPRegAlloc.cpp
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AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
…
AArch64PfmCounters.td
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AArch64PromoteConstant.cpp
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AArch64RedundantCopyElimination.cpp
[AArch64] Fix Copy Elemination for negative values
2020-12-18 13:30:46 +00:00
AArch64RegisterBanks.td
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AArch64RegisterInfo.cpp
Change materializeFrameBaseRegister() to return register
2021-01-22 15:51:06 -08:00
AArch64RegisterInfo.h
Change materializeFrameBaseRegister() to return register
2021-01-22 15:51:06 -08:00
AArch64RegisterInfo.td
[AArch64] Add a GPR64x8 register class
2020-12-17 13:45:46 +00:00
AArch64SchedA53.td
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AArch64SchedA55.td
[AArch64] Enable Cortex-A55 schedmodel
2020-11-30 19:28:34 +00:00
AArch64SchedA57.td
[AARCH64] Improve accumulator forwarding for Cortex-A57 model
2021-01-04 10:58:43 +00:00
AArch64SchedA57WriteRes.td
[AARCH64] Improve accumulator forwarding for Cortex-A57 model
2021-01-04 10:58:43 +00:00
AArch64SchedA64FX.td
[AArch64] Add Fujitsu A64FX scheduling model
2021-01-15 17:14:04 +09:00
AArch64SchedCyclone.td
…
AArch64SchedExynosM3.td
…
AArch64SchedExynosM4.td
…
AArch64SchedExynosM5.td
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AArch64SchedFalkor.td
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AArch64SchedFalkorDetails.td
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AArch64SchedKryo.td
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AArch64SchedKryoDetails.td
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AArch64SchedPredExynos.td
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AArch64SchedPredicates.td
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AArch64SchedThunderX2T99.td
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AArch64SchedThunderX3T110.td
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AArch64SchedThunderX.td
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AArch64SchedTSV110.td
[AArch64] Add pipeline model for HiSilicon's TSV110
2020-11-07 01:23:00 +03:00
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
[CodeGen] Refactor getMemBasePlusOffset & getObjectPtrOffset to accept a TypeSize
2020-08-11 12:17:10 +01:00
AArch64SelectionDAGInfo.h
…
AArch64SIMDInstrOpt.cpp
[AArch64] reuse another map iterator. NFC
2020-09-28 11:30:21 -07:00
AArch64SLSHardening.cpp
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AArch64SpeculationHardening.cpp
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AArch64StackTagging.cpp
[llvm] Use llvm::lower_bound and llvm::upper_bound (NFC)
2021-01-05 21:15:59 -08:00
AArch64StackTaggingPreRA.cpp
[MTE] Pin the tagged base pointer to one of the stack slots.
2020-10-15 12:50:16 -07:00
AArch64StorePairSuppress.cpp
…
AArch64Subtarget.cpp
AArch64: add apple-a14 as a CPU
2021-01-19 14:04:53 +00:00
AArch64Subtarget.h
[AArch64] Add Cortex CPU subtarget features for instruction fusion.
2021-01-25 09:11:29 +00:00
AArch64SVEInstrInfo.td
[llvm][Aarch64][SVE] Remove extra fmov instruction with certain literals
2021-02-16 14:16:33 +00:00
AArch64SystemOperands.td
[AArch64] Add +pauth archictecture option, allowing the v8.3a pointer authentication extension.
2021-01-08 13:21:11 +00:00
AArch64TargetMachine.cpp
[AArch64] Move machine bundle unpacking to PreEmit2 phase.
2021-02-15 16:10:43 +00:00
AArch64TargetMachine.h
Support addrspacecast initializers with isNoopAddrSpaceCast
2020-07-31 10:42:43 -04:00
AArch64TargetObjectFile.cpp
…
AArch64TargetObjectFile.h
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AArch64TargetTransformInfo.cpp
[SVE] Add support for scalable vectorization of loops with int/fast FP reductions
2021-02-16 13:50:06 +00:00
AArch64TargetTransformInfo.h
[SVE] Add support for scalable vectorization of loops with int/fast FP reductions
2021-02-16 13:50:06 +00:00
CMakeLists.txt
[AArch64] Homogeneous Prolog and Epilog Size Optimization
2021-02-02 14:57:26 -08:00
SVEInstrFormats.td
[AArch64] Correct some tablegen operand types. NFC
2021-02-06 14:34:14 +00:00
SVEIntrinsicOpts.cpp
[AArch64][SVE] Coalesce ptrue instrinsic calls where possible
2021-02-05 10:43:28 +00:00