4f58b1bd29
Second land attempt. MachineVerifier DefRegState expensive check errors fixed.
Prologs and epilogs handle callee-save registers and tend to be irregular with
different immediate offsets that are not often handled by the MachineOutliner.
Commit D18619/a5335647d5e8 (combining stack operations) stretched irregularity
further.
This patch tries to emit homogeneous stores and loads with the same offset for
prologs and epilogs respectively. We have observed that this canonicalizes
(homogenizes) prologs and epilogs significantly and results in a greatly
increased chance of outlining, resulting in a code size reduction.
Despite the above results, there are still size wins to be had that the
MachineOutliner does not provide due to the special handling X30/LR. To handle
the LR case, his patch custom-outlines prologs and epilogs in place. It does
this by doing the following:
* Injects HOM_Prolog and HOM_Epilog pseudo instructions during a Prolog and
Epilog Injection Pass.
* Lowers and optimizes said pseudos in a AArchLowerHomogneousPrologEpilog Pass.
* Outlined helpers are created on demand. Identical helpers are merged by the linker.
* An opt-in flag is introduced to enable this feature. Another threshold flag
is also introduced to control the aggressiveness of outlining for application's need.
This reduced an average of 4% of code size on LLVM-TestSuite/CTMark targeting arm64/-Oz.
Differential Revision: https://reviews.llvm.org/D76570
156 lines
6.4 KiB
C++
156 lines
6.4 KiB
C++
//==-- AArch64FrameLowering.h - TargetFrameLowering for AArch64 --*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64FRAMELOWERING_H
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#define LLVM_LIB_TARGET_AARCH64_AARCH64FRAMELOWERING_H
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#include "llvm/Support/TypeSize.h"
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#include "llvm/CodeGen/TargetFrameLowering.h"
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namespace llvm {
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class MCCFIInstruction;
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class AArch64FrameLowering : public TargetFrameLowering {
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public:
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explicit AArch64FrameLowering()
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: TargetFrameLowering(StackGrowsDown, Align(16), 0, Align(16),
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true /*StackRealignable*/) {}
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void
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emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI) const override;
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MachineBasicBlock::iterator
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const override;
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/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
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/// the function.
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void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
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void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
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bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
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StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
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Register &FrameReg) const override;
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StackOffset resolveFrameIndexReference(const MachineFunction &MF, int FI,
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Register &FrameReg, bool PreferFP,
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bool ForSimm) const;
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StackOffset resolveFrameOffsetReference(const MachineFunction &MF,
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int64_t ObjectOffset, bool isFixed,
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bool isSVE, Register &FrameReg,
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bool PreferFP, bool ForSimm) const;
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bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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ArrayRef<CalleeSavedInfo> CSI,
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const TargetRegisterInfo *TRI) const override;
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bool
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restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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MutableArrayRef<CalleeSavedInfo> CSI,
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const TargetRegisterInfo *TRI) const override;
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/// Can this function use the red zone for local allocations.
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bool canUseRedZone(const MachineFunction &MF) const;
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bool hasFP(const MachineFunction &MF) const override;
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bool hasReservedCallFrame(const MachineFunction &MF) const override;
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bool
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assignCalleeSavedSpillSlots(MachineFunction &MF,
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const TargetRegisterInfo *TRI,
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std::vector<CalleeSavedInfo> &CSI) const override;
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void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
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RegScavenger *RS) const override;
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/// Returns true if the target will correctly handle shrink wrapping.
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bool enableShrinkWrapping(const MachineFunction &MF) const override {
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return true;
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}
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bool enableStackSlotScavenging(const MachineFunction &MF) const override;
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TargetStackID::Value getStackIDForScalableVectors() const override;
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void processFunctionBeforeFrameFinalized(MachineFunction &MF,
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RegScavenger *RS) const override;
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void
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processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF,
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RegScavenger *RS) const override;
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unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override;
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unsigned getWinEHFuncletFrameSize(const MachineFunction &MF) const;
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StackOffset
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getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
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Register &FrameReg,
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bool IgnoreSPUpdates) const override;
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StackOffset getNonLocalFrameIndexReference(const MachineFunction &MF,
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int FI) const override;
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int getSEHFrameIndexOffset(const MachineFunction &MF, int FI) const;
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bool isSupportedStackID(TargetStackID::Value ID) const override {
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switch (ID) {
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default:
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return false;
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case TargetStackID::Default:
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case TargetStackID::ScalableVector:
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case TargetStackID::NoAlloc:
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return true;
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}
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}
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bool isStackIdSafeForLocalArea(unsigned StackId) const override {
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// We don't support putting SVE objects into the pre-allocated local
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// frame block at the moment.
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return StackId != TargetStackID::ScalableVector;
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}
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void
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orderFrameObjects(const MachineFunction &MF,
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SmallVectorImpl<int> &ObjectsToAllocate) const override;
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private:
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/// Returns true if a homogeneous prolog or epilog code can be emitted
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/// for the size optimization. If so, HOM_Prolog/HOM_Epilog pseudo
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/// instructions are emitted in place. When Exit block is given, this check is
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/// for epilog.
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bool homogeneousPrologEpilog(MachineFunction &MF,
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MachineBasicBlock *Exit = nullptr) const;
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/// Returns true if CSRs should be paired.
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bool producePairRegisters(MachineFunction &MF) const;
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bool shouldCombineCSRLocalStackBump(MachineFunction &MF,
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uint64_t StackBumpBytes) const;
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int64_t estimateSVEStackObjectOffsets(MachineFrameInfo &MF) const;
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int64_t assignSVEStackObjectOffsets(MachineFrameInfo &MF,
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int &MinCSFrameIndex,
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int &MaxCSFrameIndex) const;
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MCCFIInstruction
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createDefCFAExpressionFromSP(const TargetRegisterInfo &TRI,
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const StackOffset &OffsetFromSP) const;
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MCCFIInstruction createCfaOffset(const TargetRegisterInfo &MRI, unsigned DwarfReg,
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const StackOffset &OffsetFromDefCFA) const;
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bool shouldCombineCSRLocalStackBumpInEpilogue(MachineBasicBlock &MBB,
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unsigned StackBumpBytes) const;
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};
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} // End llvm namespace
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#endif
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