Hari Limaye e38392b19b

[AArch64] Transform add(x, abs(y)) -> saba(x, y, 0) (#156615) ...

Add a DAGCombine to perform the following transformations: 
- add(x, abs(y)) -> saba(x, y, 0)
- add(x, zext(abs(y))) -> sabal(x, y, 0)

As well as being a useful generic transformation, this also fixes an
issue where LLVM de-optimises [US]ABA neon ACLE intrinsics into separate
ABD+ADD instructions when one of the operands is a zero vector.

2025-09-08 14:14:24 +01:00

..

AsmParser

[LLVM][AArch64] Build attributes: Support switching to a defined subsection by name only (#154159)

2025-08-20 10:50:48 +01:00

Disassembler

[AArch64] Provide a custom decoder for LDR_ZA/STR_ZA (#156363)

2025-09-05 12:42:59 +00:00

GISel

[AArch64][GlobalISel] Add regbank information to other sha1 intrinsics.

2025-09-07 13:50:25 +01:00

MCTargetDesc

[AArch64] Correctly disassemble TSB instruction (#156362)

2025-09-05 14:35:55 +03:00

TargetInfo

[llvm] annotate interfaces in llvm/Target for DLL export (#143615)

2025-06-17 13:28:45 -07:00

Utils

[AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (#149062)

2025-08-19 10:00:28 +01:00

AArch64.h

[AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (#149062)

2025-08-19 10:00:28 +01:00

AArch64.td

[LLVM][AArch64] Relax SVE codegen predicates for sm4 instructions (#147524)

2025-07-08 17:04:21 +01:00

AArch64A53Fix835769.cpp

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

AArch64A57FPLoadBalancing.cpp

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

AArch64AdvSIMDScalarPass.cpp

[AArch64] Fix a multitude of AArch64 typos (NFC) (#143370)

2025-06-09 22:13:22 +01:00

AArch64Arm64ECCallLowering.cpp

[Arm64EC] Add support for half (#152843)

2025-08-12 14:15:52 -07:00

AArch64AsmPrinter.cpp

MC: Add Triple overloads for more MC constructors (#157321)

2025-09-08 03:41:22 +00:00

AArch64BranchTargets.cpp

[AArch64][BTI] Add BTI at EH entries. (#155308)

2025-08-30 10:56:03 +01:00

AArch64CallingConvention.cpp

[CodeGen] Provide original IR type to CC lowering (NFC) (#152709)

2025-08-11 08:57:53 +02:00

AArch64CallingConvention.h

[CodeGen] Provide original IR type to CC lowering (NFC) (#152709)

2025-08-11 08:57:53 +02:00

AArch64CallingConvention.td

[AArch64] fix trampoline implementation: use X15 (#126743)

2025-06-11 21:49:01 -04:00

AArch64CleanupLocalDynamicTLSPass.cpp

[NFC][AArch64] Final Cleanup Pass Initialization (#137744)

2025-04-29 10:59:05 -07:00

AArch64CollectLOH.cpp

[LOH] Don't emit AdrpAddStr when register could be clobbered (#142849)

2025-06-11 14:54:30 -07:00

AArch64Combine.td

[GlobalISel] Support saturated truncate (#150219)

2025-08-21 15:37:53 +01:00

AArch64CompressJumpTables.cpp

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

AArch64CondBrTuning.cpp

…

AArch64ConditionalCompares.cpp

[AArch64] Fix a multitude of AArch64 typos (NFC) (#143370)

2025-06-09 22:13:22 +01:00

AArch64ConditionOptimizer.cpp

…

AArch64DeadRegisterDefinitionsPass.cpp

[AArch64] Fix a multitude of AArch64 typos (NFC) (#143370)

2025-06-09 22:13:22 +01:00

AArch64ExpandImm.cpp

…

AArch64ExpandImm.h

…

AArch64ExpandPseudoInsts.cpp

[AArch64][SME] Support Windows/stack probes in MachineSMEABIPass (#149063)

2025-09-08 10:17:07 +01:00

AArch64FalkorHWPFFix.cpp

[AArch64] Remove unnecessary casts (NFC) (#148339)

2025-07-12 11:28:34 -07:00

AArch64FastISel.cpp

[CodeGen] Give ArgListEntry a proper constructor (NFC) (#153817)

2025-08-15 18:06:07 +02:00

AArch64Features.td

[AArch64] Add a FeatureFuseCmpCSet (#153189)

2025-08-28 21:26:12 +01:00

AArch64FMV.td

…

AArch64FrameLowering.cpp

[AArch64] NFC: Rename LastPopI in emitEpilogue (#156884)

2025-09-05 14:49:31 +01:00

AArch64FrameLowering.h

[AArch64][PAC] Protect the entire function if pac-ret+leaf is requested (#140895)

2025-07-09 18:40:45 +03:00

AArch64GenRegisterBankInfo.def

…

AArch64InstrAtomics.td

[AArch64][llvm] Codegen for 16/32/64-bit floating-point atomicrmw fminimum/faximum (#137703)

2025-04-30 22:08:44 +01:00

AArch64InstrFormats.td

[llvm-exegesis] [AArch64] Reland Resolving "not all operands are initialized by snippet generator" (#156423)

2025-09-03 14:02:30 +01:00

AArch64InstrGISel.td

Reapply "[LLVM][ISel][AArch64 Remove AArch64ISD::FCM##z nodes. (#135817)"

2025-04-24 12:44:41 +00:00

AArch64InstrInfo.cpp

CodeGen: Pass SubtargetInfo to TargetGenInstrInfo constructors (#157337)

2025-09-08 12:12:19 +09:00

AArch64InstrInfo.h

[AArch64][SME] Rework VG CFI information for streaming-mode changes (#152283)

2025-08-20 14:06:12 +01:00

AArch64InstrInfo.td

[AArch64] Transform add(x, abs(y)) -> saba(x, y, 0) (#156615)

2025-09-08 14:14:24 +01:00

AArch64ISelDAGToDAG.cpp

[AArch64] Add patterns for sub from add negative immediates (#156024)

2025-08-31 15:12:33 +01:00

AArch64ISelLowering.cpp

[AArch64] Improve lowering for scalable masked interleaving stores (#156718)

2025-09-08 10:34:53 +01:00

AArch64ISelLowering.h

[AArch64][SME] Resume streaming-mode on entry to exception handlers (#156638)

2025-09-04 12:55:12 +01:00

AArch64LoadStoreOptimizer.cpp

[AArch64] Fix stp kill when merging forward. (#152994)

2025-08-12 14:19:43 +01:00

AArch64LowerHomogeneousPrologEpilog.cpp

[AArch64] Fix a multitude of AArch64 typos (NFC) (#143370)

2025-06-09 22:13:22 +01:00

AArch64MachineFunctionInfo.cpp

[AArch64][SVE] Avoid using the SVE stack size before it is determined (#147561)

2025-07-09 10:55:33 +01:00

AArch64MachineFunctionInfo.h

[AArch64][SME] Support Windows/stack probes in MachineSMEABIPass (#149063)

2025-09-08 10:17:07 +01:00

AArch64MachineScheduler.cpp

…

AArch64MachineScheduler.h

…

AArch64MacroFusion.cpp

[AArch64] Add a FeatureFuseCmpCSet (#153189)

2025-08-28 21:26:12 +01:00

AArch64MacroFusion.h

…

AArch64MCInstLower.cpp

AArch64: Remove deprecated AArch64MCExpr::Specifier

2025-06-26 00:23:35 -07:00

AArch64MCInstLower.h

…

AArch64MIPeepholeOpt.cpp

[AArch64] Allow splitting bitmasks for EOR/ORR. (#150394)

2025-08-07 10:42:30 +01:00

AArch64PBQPRegAlloc.cpp

…

AArch64PBQPRegAlloc.h

…

AArch64PerfectShuffle.h

[AArch64][TTI] Reduce cost for splatting whole first vector segment (SVE) (#145701)

2025-07-02 09:51:56 +01:00

AArch64PfmCounters.td

…

AArch64PointerAuth.cpp

[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)

2025-05-06 11:31:04 +02:00

AArch64PointerAuth.h

…

AArch64PostCoalescerPass.cpp

…

AArch64Processors.td

[AArch64] Add a FeatureFuseCmpCSet (#153189)

2025-08-28 21:26:12 +01:00

AArch64PromoteConstant.cpp

[AArch64] Do not promote scalable constants to global variables (#146926)

2025-07-07 09:17:31 +01:00

AArch64RedundantCopyElimination.cpp

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

AArch64RegisterBanks.td

…

AArch64RegisterInfo.cpp

[AArch64] "Support" debug info for SVE types on Windows. (#147865)

2025-07-13 16:06:27 -07:00

AArch64RegisterInfo.h

[AArch64] "Support" debug info for SVE types on Windows. (#147865)

2025-07-13 16:06:27 -07:00

AArch64RegisterInfo.td

[AArch64] Fix the type of NZCV operands/results (#150313)

2025-07-24 11:48:28 +03:00

AArch64SchedA53.td

[AArch64] Fix a multitude of AArch64 typos (NFC) (#143370)

2025-06-09 22:13:22 +01:00

AArch64SchedA55.td

…

AArch64SchedA57.td

…

AArch64SchedA57WriteRes.td

…

AArch64SchedA64FX.td

…

AArch64SchedA320.td

[AArch64] Define constructive EXT_ZZI pseudo instruction (#152552)

2025-08-15 09:05:10 +01:00

AArch64SchedA510.td

[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)

2025-08-15 15:45:33 +01:00

AArch64SchedAmpere1.td

…

AArch64SchedAmpere1B.td

…

AArch64SchedCyclone.td

…

AArch64SchedExynosM3.td

…

AArch64SchedExynosM4.td

…

AArch64SchedExynosM5.td

…

AArch64SchedFalkor.td

…

AArch64SchedFalkorDetails.td

…

AArch64SchedKryo.td

…

AArch64SchedKryoDetails.td

…

AArch64SchedNeoverseN1.td

…

AArch64SchedNeoverseN2.td

[AArch64] Define constructive EXT_ZZI pseudo instruction (#152552)

2025-08-15 09:05:10 +01:00

AArch64SchedNeoverseN3.td

[AArch64] Define constructive EXT_ZZI pseudo instruction (#152552)

2025-08-15 09:05:10 +01:00

AArch64SchedNeoverseV1.td

[AArch64] Define constructive EXT_ZZI pseudo instruction (#152552)

2025-08-15 09:05:10 +01:00

AArch64SchedNeoverseV2.td

[AArch64] Define constructive EXT_ZZI pseudo instruction (#152552)

2025-08-15 09:05:10 +01:00

AArch64SchedOryon.td

[AArch64] Fix a multitude of AArch64 typos (NFC) (#143370)

2025-06-09 22:13:22 +01:00

AArch64SchedPredExynos.td

…

AArch64SchedPredicates.td

…

AArch64SchedPredNeoverse.td

…

AArch64SchedThunderX2T99.td

…

AArch64SchedThunderX3T110.td

…

AArch64SchedThunderX.td

…

AArch64SchedTSV110.td

…

AArch64Schedule.td

…

AArch64SelectionDAGInfo.cpp

[CodeGen] Give ArgListEntry a proper constructor (NFC) (#153817)

2025-08-15 18:06:07 +02:00

AArch64SelectionDAGInfo.h

[AArch64] TableGen-erate SDNode descriptions (#140472)

2025-05-28 12:02:58 +01:00

AArch64SIMDInstrOpt.cpp

[AArch64] Fix a multitude of AArch64 typos (NFC) (#143370)

2025-06-09 22:13:22 +01:00

AArch64SLSHardening.cpp

[AArch64] Fix a multitude of AArch64 typos (NFC) (#143370)

2025-06-09 22:13:22 +01:00

AArch64SMEInstrInfo.td

[AArch64][SME] Support Windows/stack probes in MachineSMEABIPass (#149063)

2025-09-08 10:17:07 +01:00

AArch64SpeculationHardening.cpp

[AArch64] Fix a multitude of AArch64 typos (NFC) (#143370)

2025-06-09 22:13:22 +01:00

AArch64StackTagging.cpp

[IR] Remove size argument from lifetime intrinsics (#150248)

2025-08-08 11:09:34 +02:00

AArch64StackTaggingPreRA.cpp

…

AArch64StorePairSuppress.cpp

[AArch64] Remove unnecessary casts (NFC) (#148339)

2025-07-12 11:28:34 -07:00

AArch64Subtarget.cpp

[MISched] Use SchedRegion in overrideSchedPolicy and overridePostRASchedPolicy (#149297)

2025-07-22 15:55:12 +08:00

AArch64Subtarget.h

[AArch64] Add a FeatureFuseCmpCSet (#153189)

2025-08-28 21:26:12 +01:00

AArch64SVEInstrInfo.td

[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#117007)

2025-09-02 15:35:15 +01:00

AArch64SystemOperands.td

[AArch64] Correctly disassemble TSB instruction (#156362)

2025-09-05 14:35:55 +03:00

AArch64TargetMachine.cpp

[AArch64] Don't run loop-idiom-vectorize pass in the O0 pipeline (#156802)

2025-09-06 00:12:36 -07:00

AArch64TargetMachine.h

[AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (#149062)

2025-08-19 10:00:28 +01:00

AArch64TargetObjectFile.cpp

MCSectionELF: Remove classof

2025-07-25 09:50:19 -07:00

AArch64TargetObjectFile.h

…

AArch64TargetTransformInfo.cpp

[AArch64] Give a higher cost for more expensive SVE FCMP instructions (#153816)

2025-09-04 19:50:39 +01:00

AArch64TargetTransformInfo.h

[AArch64] Give a higher cost for more expensive SVE FCMP instructions (#153816)

2025-09-04 19:50:39 +01:00

CMakeLists.txt

[AArch64] Don't run loop-idiom-vectorize pass in the O0 pipeline (#156802)

2025-09-06 00:12:36 -07:00

MachineSMEABIPass.cpp

[AArch64][SME] Support Windows/stack probes in MachineSMEABIPass (#149063)

2025-09-08 10:17:07 +01:00

SMEABIPass.cpp

[NFC][LLVM] Use INITILIZE_PASS instead of INITIALIZE_PASS_BEGIN/END (#156212)

2025-09-03 07:54:21 -07:00

SMEInstrFormats.td

[AArch64] Provide a custom decoder for LDR_ZA/STR_ZA (#156363)

2025-09-05 12:42:59 +00:00

SMEPeepholeOpt.cpp

[AArch64][SME] Rework VG CFI information for streaming-mode changes (#152283)

2025-08-20 14:06:12 +01:00

SVEInstrFormats.td

[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#117007)

2025-09-02 15:35:15 +01:00

SVEIntrinsicOpts.cpp

[NFC][AArch64] Final Cleanup Pass Initialization (#137744)

2025-04-29 10:59:05 -07:00