Hal Finkel 01271c6022 Don't reserve R2 on Darwin/PPC ...

Now that only the register-scavenger version of the CR spilling code remains,
we no longer need the Darwin R2 hack. Darwin can use R0 as a spare register in
any case where the System V ABI uses it (R0 is special architecturally, and so
is reserved under all common ABIs).

A few test cases needed to be updated to reflect the register-allocation changes.

llvm-svn: 176868

2013-03-12 15:18:14 +00:00

..

AArch64

Test case hygiene.

2013-03-09 18:25:40 +00:00

ARM

Upgrading debug info test cases to be (more) compatible with the current debug info format.

2013-03-11 22:37:40 +00:00

CPP

test commit

2012-07-18 17:53:05 +00:00

Generic

For inline asm:

2013-01-11 18:12:39 +00:00

Hexagon

Hexagon: Add patterns for zero extended loads from i1->i64.

2013-03-08 14:15:15 +00:00

Inputs

Upgrading debug info test cases to be (more) compatible with the current debug info format.

2013-03-11 22:37:40 +00:00

MBlaze

Remove duplicate test contents.

2013-03-11 22:10:14 +00:00

Mips

Remove duplicate test contents.

2013-03-11 22:10:14 +00:00

MSP430

Remove duplicate test contents.

2013-03-11 22:10:14 +00:00

NVPTX

[NVPTX] Disable vector registers

2013-02-12 14:18:49 +00:00

PowerPC

Don't reserve R2 on Darwin/PPC

2013-03-12 15:18:14 +00:00

R600

llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.

2013-03-11 23:16:30 +00:00

SI

Add R600 backend

2012-12-11 21:25:42 +00:00

SPARC

Remove duplicate test contents.

2013-03-11 22:10:14 +00:00

Thumb

Remove duplicate test contents.

2013-03-11 22:10:14 +00:00

Thumb2

SDAG: Handle scalarizing an extend of a <1 x iN> vector.

2013-03-07 05:47:54 +00:00

X86

Upgrading debug info test cases to be (more) compatible with the current debug info format.

2013-03-11 22:37:40 +00:00

XCore

Remove duplicate test contents.

2013-03-11 22:10:14 +00:00