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llvm-project/llvm/test/TableGen
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Adam Nemet 9f5a670297
[TableGen] !subst on a dag should retain name of operator (#141195) 
Without this patch the !subst in the test drops the name "$frag" from
(one_frag:$frag ...) and returns:

```
(set FPR32_NEW:$dst, (one_frag FPR32_NEW:$a, FPR32_NEW:$b))
```
2025-05-23 12:03:56 -07:00
..
Common
…
CompressInstEmitter
[TableGen][RISCV] Support sub-operands in CompressInstEmitter.cpp. (#133039)
2025-03-27 19:10:40 -07:00
FixedLenDecoderEmitter
[TableGen] More named sub-operands work.
2022-12-07 14:37:08 -05:00
GlobalISelCombinerEmitter
Reland [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (#137701)
2025-04-30 22:06:37 +01:00
GlobalISelEmitter
GlobalISel: Translate minimumnum and maximumnum (#139106)
2025-05-08 20:03:34 +02:00
SDNodeInfoEmitter
[StrTable] Switch intrinsics to StringTable and work around MSVC (#123548)
2025-01-28 00:17:04 -08:00
64-bit-int.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
2003-08-03-PassCode.td
…
2006-09-18-LargeInt.td
…
2010-03-24-PrematureDefaults.td
…
AcquireAtCycle.td
[TableGen][MCSched] Update error messages on the range of Acquire/ReleaseAtCycle (#131908)
2025-03-24 13:42:28 -07:00
address-space-patfrags.td
[DAG] Use SDValue for PatFrag checks (#137519)
2025-05-01 08:58:59 +01:00
AliasAsmString.td
…
AllowDuplicateRegisterNames.td
[MC][AsmParser] Make MatchRegisterName return MCRegister (NFC) (#81408)
2024-02-18 13:59:49 +03:00
ambiguous-composition.td
…
AnonDefinitionOnDemand.td
…
anonymous-location.td
[LIT] Rename substitution %basename_s to %{s:basename} (#111062)
2024-10-03 18:18:10 -07:00
arithmetic.td
…
ArtificialSubregs.td
[TableGen] Fix calculation of Lanemask for RCs with artificial subregs. (#114392)
2024-11-04 16:10:50 +00:00
AsmPredicateCombining.td
[AArch64] Add target feature "all"
2022-06-30 10:37:58 -07:00
AsmPredicateCombiningRISCV.td
[RISCV] Don't convert virtual register Register to MCRegister in isCompressibleInst. (#122843)
2025-01-13 23:36:09 -08:00
AsmPredicateCondsEmission.td
…
AsmVariant.td
…
AsmWriterPCRelOp.td
…
assert.td
[TableGen] Print assert message inline with assert failure (#111184)
2024-10-04 13:21:50 -07:00
bare-minimum-psets.td
[TableGen] const char *const x => const char x[]
2022-06-10 19:13:59 -07:00
BigEncoder.td
…
BitOffsetDecoder.td
…
BitsInit.td
[TableGen] Add assert to validate Objects list for HwModeSelect (#123794)
2025-01-27 13:44:44 -08:00
BitsInitErrors.td
[TableGen] Add assert to validate Objects list for HwModeSelect (#123794)
2025-01-27 13:44:44 -08:00
BitsInitOverflow.td
…
cast-list-initializer.td
…
cast-multiclass.td
…
cast-string.td
…
cast-typeerror.td
…
cast.td
…
cc-assign-to-reg-tuple.td
[TableGen][NFC] Use early exit to simplify large block in emitAction. (#138220)
2025-05-08 12:12:15 -05:00
check-duplicate-tuple-regs.td
[TableGen] Check for duplicate register tuple definitions. (#95725)
2024-06-25 16:42:29 -05:00
ClassInstanceValue.td
…
code.td
…
CodeGenSchedule-duplicate-instrw.td
…
compare.td
…
CompressWriteLatencyEntry.td
[llvm-tblgen] CodeGenSchedModels::hasReadOfWrite gets wrong predication result
2022-09-19 14:22:43 +08:00
ConcatenatedSubregs.td
[Target][RISCV] Add HwMode support to subregister index size/offset. (#86368)
2024-03-27 12:19:28 -07:00
cond-bitlist.td
…
cond-default.td
…
cond-empty-list-arg.td
…
cond-inheritance.td
…
cond-let.td
…
cond-list.td
…
cond-subclass.td
…
cond-type.td
…
cond-usage.td
…
condsbit.td
…
ConstraintChecking1.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking2.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking3.td
[TableGen] Fix operand constraint checking problem. (#85859)
2024-03-20 13:32:38 -05:00
ConstraintChecking4.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking5.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking6.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking7.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking8.td
[TableGen] Fix operand constraint checking problem. (#85859)
2024-03-20 13:32:38 -05:00
ConstraintChecking.inc
…
CStyleComment.td
…
dag-functional.td
…
dag-isel-complexpattern.td
[SelectionDAG] Add space-optimized forms of OPC_CheckComplexPat (#73310)
2024-01-11 15:28:12 +08:00
dag-isel-instrument.td
[llvm-tblgen] Increase Coverage Index Size (#118329)
2024-12-04 09:19:13 +00:00
dag-isel-regclass-emit-enum.td
[MVT][TableGen] Extend Machine Value Type to uint16_t (#99657)
2024-08-01 01:19:14 +08:00
dag-isel-res-order.td
[SelectionDAG] Add space-optimized forms of OPC_EmitNode/OPC_MorphNodeTo (#73502)
2023-12-12 17:45:32 +08:00
dag-isel-subregs.td
[SelectionDAG] Add instantiated OPC_EmitInteger and OPC_EmitStringInteger (#73241)
2023-11-27 11:08:28 +08:00
dag-subst.td
[TableGen] !subst on a dag should retain name of operator (#141195)
2025-05-23 12:03:56 -07:00
Dag.td
…
DAGDefaultOps.td
[SelectionDAG] Add space-optimized forms of OPC_EmitNode/OPC_MorphNodeTo (#73502)
2023-12-12 17:45:32 +08:00
def-multiple-operands.td
[TableGen][InstrInfoEmitter] Count sub-operands on def operands
2024-04-16 20:34:20 -04:00
defmclass.td
…
DefmInherit.td
…
DefmInsideMultiClass.td
…
defset-typeerror.td
…
defset.td
…
deftype.td
[TableGen] Support type aliases via new keyword deftype
2024-02-02 17:41:47 +08:00
defvar.td
[TableGen] Unify the priority of variables
2023-05-24 12:44:14 +08:00
detailed-records.td
…
directive1.td
[utils][TableGen] Unify name qualifications in DirectiveEmitter (#140606)
2025-05-20 07:56:59 -05:00
directive2.td
[utils][TableGen] Unify name qualifications in DirectiveEmitter (#140606)
2025-05-20 07:56:59 -05:00
directive3.td
…
dump.td
[TableGen] Resolve References at top level (#104578)
2024-08-19 21:05:39 +05:30
duplicate-include.inc
…
duplicate-include.td
…
DuplicateFieldValues.td
…
DuplicateProcessorFeatures.td
[TableGen] Print a warning when a Processor contains duplicate Features / TuneFeatures (#137864)
2025-04-29 16:22:48 -07:00
empty-psets.td
…
empty.td
…
eq-unset.td
…
eq.td
…
eqbit.td
…
exists-error-non-string.td
[TableGen] Add new operator !exists
2022-06-23 11:11:47 +08:00
exists-error-record.td
[TableGen] Add new operator !exists
2022-06-23 11:11:47 +08:00
exists-error-uninitialized.td
[TableGen] Add new operator !exists
2022-06-23 11:11:47 +08:00
exists.td
[RISCV][llvm-tblgen] Support conditional definitions using !exists clauses
2023-03-03 11:29:47 -08:00
FastISelEmitter.td
…
field-access-initializers.td
…
FieldAccess.td
…
filter.td
…
find.td
…
foldl.td
…
foreach-eval.td
…
foreach-leak.td
…
foreach-multiclass.td
…
foreach-range-parse-errors0.td
…
foreach-range-parse-errors1.td
…
foreach-range-parse-errors2.td
…
foreach-range-parse-errors3.td
…
foreach-range-parse-errors4.td
…
foreach-range-parse-errors5.td
…
foreach-variable-range.td
…
foreach.td
…
ForeachList.td
…
ForeachLoop.td
…
ForwardRef.td
…
GeneralList.td
…
generic-tables-instruction.td
[TableGen][NFC] Factor early-out range check. (#123645)
2025-01-20 19:13:31 -06:00
generic-tables-return-range.td
[TableGen] Add support for emitting new function definition to return a range of results for Primary Key (#96174)
2024-07-11 10:54:31 -07:00
generic-tables.td
[TableGen][NFC] Factor early-out range check. (#123645)
2025-01-20 19:13:31 -06:00
GenTags.td
[TableGen] Add a location for a class definition that was forward-declared
2022-07-20 15:56:17 +02:00
get-named-operand-idx.td
[TableGen] Emit OpName as an enum class instead of a namespace (#125313)
2025-02-12 08:19:30 -08:00
get-operand-type-no-expand.td
[TableGen][InstrInfo] Cull mapping that have not been enabled/not needed (#126137)
2025-02-10 08:16:12 -08:00
get-operand-type.td
[TableGen][InstrInfo] Cull mapping that have not been enabled/not needed (#126137)
2025-02-10 08:16:12 -08:00
getsetop.td
[TableGen] Support non-def operators in !getdagop (#77531)
2024-01-10 06:59:38 -08:00
HasNoUse.td
[DAG] Use SDValue for PatFrag checks (#137519)
2025-05-01 08:58:59 +01:00
HwModeBitSet.td
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
2024-05-04 20:08:26 -05:00
HwModeEncodeAPInt.td
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
2024-05-04 20:08:26 -05:00
HwModeEncodeDecode2.td
[TableGen] Introduce a less aggressive suppression for HwMode Decoder… (#86060)
2024-04-01 17:19:46 +08:00
HwModeEncodeDecode3.td
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
2024-05-04 20:08:26 -05:00
HwModeEncodeDecode.td
[TableGen] Fixes for per-HwMode decoding problem (#82201)
2024-02-19 13:14:22 +08:00
HwModeSelect.td
[TableGen] Add assert to validate Objects list for HwModeSelect (#123794)
2025-01-27 13:44:44 -08:00
HwModeSubRegs.td
[Target][RISCV] Add HwMode support to subregister index size/offset. (#86368)
2024-03-27 12:19:28 -07:00
if-empty-list-arg.td
…
if-type.td
…
if-unresolved-cast.td
[llvm-tblgen] Support conditional definitions using !casts clauses
2023-03-10 15:50:11 -08:00
if.td
…
ifbit.td
…
ifstmt.td
…
Include.inc
…
Include.td
…
inhibit-pset.td
[TableGen] const char *const x => const char x[]
2022-06-10 19:13:59 -07:00
initialized.td
[llvm][TableGen] Add a !initialized predicate to allow testing for ? (#117964)
2024-12-17 20:34:35 -06:00
instances.td
[TableGen] Add !instances operator to get defined records (#129680)
2025-03-28 16:31:00 +08:00
IntBitInit.td
…
interleave.td
…
intrinsic-attrs.td
[Intrinsics] Add support for range attributes (#135642)
2025-04-17 11:11:00 +02:00
intrinsic-duplicate-name.td
[LLVM][TableGen] Add error check for duplicate intrinsic names (#109226)
2024-09-19 05:21:00 -07:00
intrinsic-long-name.td
[TableGen] Refactor Intrinsics record (#106986)
2024-09-04 15:04:10 -07:00
intrinsic-overload-conflict.td
[LLVM][TableGen] Refine overloaded intrinsic suffix check (#117957)
2024-12-03 13:33:15 -05:00
intrinsic-prefix-error.td
[TableGen] Add PrintError family overload that take a print function (#107333)
2024-09-07 05:13:54 -07:00
intrinsic-struct.td
[TableGen] Add check for number of intrinsic return values (#107326)
2024-09-05 14:52:30 -07:00
intrinsic-target-prefix-for-target-independent.td
[LLVM][TableGen] Check name conflicts between target dep and independent intrinsics (#109826)
2024-09-25 12:01:17 -07:00
intrinsic-varargs.td
llvm/test/TableGen/intrinsic-*.td: Use Intrinsics.td instead of mock
2023-03-20 06:48:14 +09:00
IntSpecialValues.td
…
invalid-macro-name-command-line.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
invalid-type-cast-patfrags.td
[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)
2024-10-01 11:17:00 +04:00
InvalidMCSchedClassDesc.td
…
isa-non-primary.td
[tblgen] Fix behavior of !isa to prevent premature folding (#130442)
2025-03-18 20:05:37 -07:00
isa.td
…
JSON-check.py
[NFC][Py Reformat] Reformat python files in llvm
2023-05-17 10:48:52 +02:00
JSON-locs.td
[TableGen] Include source location in JSON dump (#79028)
2024-01-24 17:07:20 +00:00
JSON.td
[TableGen] Include source location in JSON dump (#79028)
2024-01-24 17:07:20 +00:00
LazyChange.td
…
LetInsideMultiClasses.td
…
letUnknownValue.td
[llvm][TableGen] Fix misleading error for invalid use of let (#118616)
2024-12-09 13:21:46 +00:00
lisp.td
…
list-element-bitref.td
…
ListArgs.td
…
ListArgsSimple.td
…
listconcat.td
…
ListConversion.td
…
listflatten-error.td
[NFC] Fix line endings for OptionStrCmp.h and .td test files (#109806)
2024-09-24 12:24:17 -07:00
listflatten.td
[NFC] Fix line endings for OptionStrCmp.h and .td test files (#109806)
2024-09-24 12:24:17 -07:00
ListManip.td
…
ListOfList.td
…
listpaste.td
…
listremove.td
[TableGen] Add a !listremove() bang operator
2022-12-09 15:03:18 +00:00
ListSlices-fail.td
TableGen: Let expressions available to list subscriptions and list slices
2023-04-26 23:47:16 +09:00
ListSlices.td
TableGen: Let expressions available to list subscriptions and list slices
2023-04-26 23:47:16 +09:00
listsplat.td
…
lit.local.cfg
[AIX] Use internal lit shell for TableGen instead of a global setting (#113627)
2024-10-25 13:06:02 -04:00
LoLoL.td
…
MacroFusion.td
[TableGen][MacroFusion] Predicate if the first inst has the same register (#137778)
2025-05-13 19:05:42 +08:00
match.td
[TableGen] Add !match operator to do regex matching (#130759)
2025-03-13 12:13:09 +08:00
math.td
[TableGen] Add log bang operator
2022-10-26 09:16:32 -07:00
MissingOperandField.td
[TableGen] Delete support for deprecated positional matching.
2023-03-07 15:04:09 -05:00
MixedCasedMnemonic.td
[StrTable] Switch intrinsics to StringTable and work around MSVC (#123548)
2025-01-28 00:17:04 -08:00
MnemonicAlias.td
…
MultiClass-def-fail.td
…
MultiClass-defm-fail.td
…
MultiClass-defm.td
…
MultiClass.td
…
MultiClassDefName.td
…
MultiClassInherit.td
…
MultiPat.td
…
multiple-type-casts-patfrags.td
[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)
2024-10-01 11:17:00 +04:00
name-resolution-consistency.td
…
named-arguments.td
[TableGen] Support named arguments
2023-07-20 16:03:17 +08:00
nested_ifdef2.inc
[TableGen] Fix incorrect handling of nested #ifndef directives
2023-09-07 12:42:22 -07:00
nested_ifdef_main.td
[TableGen] Fix incorrect handling of nested #ifndef directives
2023-09-07 12:42:22 -07:00
nested_ifdef.inc
[TableGen] Fix incorrect handling of nested #ifndef directives
2023-09-07 12:42:22 -07:00
nested-comment.td
…
NestedForeach.td
…
nul-char.td
…
paste-reserved.td
…
Paste.td
…
PerWriteCycleCount.td
[TableGen] Add support for per-write cycle tunables (#125870)
2025-02-17 11:32:47 +00:00
pr8330.td
…
predicate-patfags.td
[TableGen] Directly use SDNode functions to implement HasOneUse and HasNoUse. NFC (#133976)
2025-04-01 22:14:17 -07:00
prep-diag1.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag2.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag3.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag4.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag5.td
…
prep-diag6.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag7.td
…
prep-diag8.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag9.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag10.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag11-include.inc
…
prep-diag11.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag12-include.inc
…
prep-diag12.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag13.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag14.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef-diag-1.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef-diag-2.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef.td
…
prep-region-include.inc
…
prep-region-processing.td
…
ProcessorUniqueNames.td
[TableGen] Rework error reporting for duplicate Feature/Processor (#102257)
2024-08-08 02:00:36 +03:00
pset-enum.td
…
pseudo-inst-expansion.td
…
range-lists.td
…
range-op-fail.td
[TableGen] Enhance !range bang operator (#66489)
2023-09-27 12:07:36 +08:00
range-op.td
[TableGen] Enhance !range bang operator (#66489)
2023-09-27 12:07:36 +08:00
rc-weight-override.td
…
ReadAdvanceInvalidWrite.td
[CodeGenSchedule] Don't allow invalid ReadAdvances to be formed (#82685)
2024-02-26 18:25:21 -08:00
RegBankFromRegClass.td
[GISel][TableGen] Generate getRegBankFromRegClass (#99896)
2024-07-25 09:41:55 -04:00
RegisterBankEmitter.td
…
RegisterClass.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
RegisterEncoder.td
[TableGen] More named sub-operands work.
2022-12-07 14:37:08 -05:00
RegisterInfoEmitter-BaseClassOrder.td
[TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.
2023-07-27 10:42:21 +01:00
RegisterInfoEmitter-inherit-properties.td
[TableGen] Inherit properties from the nearest allocatable superclass. (#127018)
2025-03-25 15:54:06 -05:00
RegisterInfoEmitter-regcost-list.td
…
RegisterInfoEmitter-regcost-tuple.td
TableGen: Let getAllDerivedDefinitions() numeric order.
2023-03-31 06:00:54 +09:00
RegisterInfoEmitter-regcost.td
…
RegisterInfoEmitter-tsflags.td
…
RelTest.td
…
repr.td
[TableGen] New bang operator !repr. (#68716)
2023-10-11 13:11:48 +02:00
riscv-target-def.td
[RISCV] Add mvendorid/marchid/mimpid to CPU definitions (#116202)
2024-11-22 22:58:54 +08:00
SchedModelError.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
searchabletables-intrinsic.td
[TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (#107339)
2024-09-07 15:11:34 -07:00
self-reference-recursion.td
…
self-reference-typeerror.td
…
self-reference.td
…
SetTheory.td
…
SiblingForeach.td
…
simplify-patfrag.td
[TableGen] ShouldIgnore Pattern bit to disable DAG pattern imports during GISel (#88382)
2024-04-25 16:42:48 -04:00
size.td
…
Slice.td
…
spurious-semi.td
…
strconcat.td
…
string_ops.td
[TableGen] add !toupper and !tolower operators to change the casing of strings.
2023-03-07 12:41:56 +00:00
String.td
…
SubRegsAndAliases.td
[TableGen][CodeGen] Give every leaf register a unique regunit (#139526)
2025-05-13 10:52:36 +01:00
subst2.td
…
subst.td
…
substr.td
…
SubtargetFeatureUniqueNames.td
[TableGen] Rework error reporting for duplicate Feature/Processor (#102257)
2024-08-08 02:00:36 +03:00
SuperSubclassSameName.td
…
TargetInstrInfo.td
…
TargetInstrSpec.td
…
template-arg-dependency.td
…
template-args.td
[TableGen] Do not exit in template argument check (#121636)
2025-01-06 21:06:17 +01:00
TemplateArgRename.td
…
Tree.td
…
TreeNames.td
…
true-false.td
[TableGen] Make !and and !or short-circuit (#113963)
2024-11-07 10:22:03 -08:00
trydecode-emission2.td
[LLVM][TableGen] Do not test fixed opcode value in DecoderEmitter tests (#136724)
2025-04-22 11:27:39 -07:00
trydecode-emission3.td
[LLVM][TableGen] Do not test fixed opcode value in DecoderEmitter tests (#136724)
2025-04-22 11:27:39 -07:00
trydecode-emission4.td
[LLVM][TableGen] Do not test fixed opcode value in DecoderEmitter tests (#136724)
2025-04-22 11:27:39 -07:00
trydecode-emission.td
[LLVM][TableGen] Do not test fixed opcode value in DecoderEmitter tests (#136724)
2025-04-22 11:27:39 -07:00
TwoLevelName.td
…
UnsetBitInit.td
…
unsetop.td
…
unterminated-c-comment-include.inc
…
unterminated-c-comment.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
unterminated-code-block-include.inc
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unterminated-code-block.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
UnterminatedComment.td
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usevalname.td
[TableGen] Add missing $ before the dag operator name (#140969)
2025-05-22 16:21:19 -07:00
ValidIdentifiers.td
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VarLenDecoder.td
[LLVM][TableGen] Fix VarlenDecoder.td to not used fixed opcode values (#136632)
2025-04-21 17:46:24 -07:00
VarLenEncoder.td
[NFC][TableGen] Create valid Dag in VarLenCodeEmitter (#140283)
2025-05-19 12:27:18 -07:00
VarLenEncoderHwModes.td
[Tablegen] Bugfix and refactor VarLenCodeEmitter HwModes. (#68795)
2023-10-20 07:21:24 +02:00
warn-unused-template-arg.td
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x86-fold-tables.inc
[X86][NFC] Add missing immediate qualifier to VSM3RNDS2 instruction (#131576)
2025-03-17 17:59:39 +08:00
x86-fold-tables.td
[TableGen] Handle Windows line endings in x86-fold-tables.td test (#112997)
2024-10-21 09:58:59 -07:00
x86-instr-mapping.inc
[X86][NF] Switch the order of Inst and &Target.getInstruction(NewRec) (#130739)
2025-03-12 17:35:54 +08:00
x86-instr-mapping.td
Test added for x86-instr-mapping (#115170)
2024-11-07 19:09:21 +08:00