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llvm-project/llvm/test/Transforms/SLPVectorizer/RISCV
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Alexey Bataev 3918ef3688
[SLP]Fix the analysis for masked compress loads 
Need to remove the check for Orders in interleaved loads analysis and
estimate shuffle cost without the reordering to correctly handle the
costs of masked compress loads.

Reviewers: hiraditya, HanKuanChen, RKSimon

Reviewed By: HanKuanChen, RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/140647
2025-05-20 07:31:16 -04:00
..
check-node-without-vector-user.ll
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combined-loads-stored.ll
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complex-loads.ll
[SLP]Improve reordering of the alternate nodes
2025-04-24 14:33:10 -04:00
ctpop.ll
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floating-point.ll
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fminimumnum.ll
[RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (#135727)
2025-04-27 19:10:02 +08:00
fround.ll
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gather-node-with-no-users.ll
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gep.ll
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getpointerschaincost.ll
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horizontal-list.ll
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init-ext-node-not-truncable.ll
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interleave-greater-than-slice.ll
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lit.local.cfg
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load-binop-store.ll
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load-store.ll
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loads-ordering.ll
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long-gep-chains.ll
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long-mask-split.ll
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math-function.ll
[SLP]Fix/improve getSpillCost analysis
2025-03-04 15:47:23 -05:00
minbw-with-and-and-scalar-trunc.ll
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mixed-extracts-types.ll
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partial-vec-invalid-cost.ll
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phi-const.ll
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reduced-value-repeated-and-vectorized.ll
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reduction-extension-after-bitwidth.ll
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reductions.ll
[RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (#136191)
2025-04-22 10:50:20 -07:00
remark-zext-incoming-for-neg-icmp.ll
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remarks_cmp_sel_min_max.ll
[SLP]Represent SLP graph as a tree
2025-02-21 07:15:02 -05:00
remarks-insert-into-small-vector.ll
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reordered-buildvector-scalars.ll
[SLP]Fix a crash when checking a scalar in a reordered buildvector node
2025-02-21 14:59:43 -08:00
reordered-interleaved-loads.ll
[SLP]Do not try to use interleaved loads, if reordering is required
2025-05-12 14:12:51 -07:00
repeated-address-store.ll
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revec-getGatherCost.ll
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revec.ll
[SLP] Sort PHIs by ExtractElements when relevant (#131229)
2025-03-17 14:19:46 -07:00
reversed-strided-node-with-external-ptr.ll
[SLP] Make getSameOpcode support interchangeable instructions. (#135797)
2025-04-16 00:08:59 +08:00
rvv-min-vector-size.ll
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scalable-type-to-vect.ll
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scatter-vectorize-reversed.ll
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segmented-loads-simple.ll
[SLP]Prefer segmented/deinterleaved loads to strided and fix codegen
2025-04-22 12:11:01 -04:00
segmented-loads.ll
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segmented-stores.ll
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select-profitability.ll
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shuffled-gather-casted.ll
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small-phi-tree.ll
[SLP]Represent SLP graph as a tree
2025-02-21 07:15:02 -05:00
small-tree-not-schedulable-bv-node.ll
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smax-reduction-unsigned-missing-sign.ll
[SLP]Fix type promotion for smax reduction with unsigned reduced operands
2025-04-16 10:14:29 -07:00
smax-unsigned-operand.ll
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smin-reduction-unsigned-missing-sign.ll
[SLP]Mark smin reduction as signed compare
2025-04-15 07:24:17 -07:00
smin-signed-zextended.ll
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spillcost.ll
[SLP]Fix/improve getSpillCost analysis
2025-03-04 15:47:23 -05:00
strided-loads-vectorized.ll
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strided-loads-with-external-indices.ll
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strided-loads-with-external-use-ptr.ll
[SLP]Fix the analysis for masked compress loads
2025-05-20 07:31:16 -04:00
strided-loads.ll
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strided-stores-vectorized.ll
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strided-unsupported-type.ll
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struct-gep.ll
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trunc-bv-multi-uses.ll
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trunc-to-large-than-bw.ll
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unordered-loads-operands.ll
[SLP]Fix the analysis for masked compress loads
2025-05-20 07:31:16 -04:00
unsigned-icmp-signed-op.ll
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unsigned-node-trunc-with-signed-users.ll
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vec3-base.ll
[SLP] Make getSameOpcode support interchangeable instructions. (#135797)
2025-04-16 00:08:59 +08:00
vec15-base.ll
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