89b57061f7
This moves the registry higher in the LLVM library dependency stack. Every client of the target registry needs to link against MC anyway to actually use the target, so we might as well move this out of Support. This allows us to ensure that Support doesn't have includes from MC/*. Differential Revision: https://reviews.llvm.org/D111454
114 lines
3.9 KiB
C++
114 lines
3.9 KiB
C++
//===-- VEMCTargetDesc.cpp - VE Target Descriptions -----------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides VE specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "VEMCTargetDesc.h"
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#include "TargetInfo/VETargetInfo.h"
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#include "VEInstPrinter.h"
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#include "VEMCAsmInfo.h"
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#include "VETargetStreamer.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/ErrorHandling.h"
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using namespace llvm;
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#define GET_INSTRINFO_MC_DESC
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#include "VEGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "VEGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "VEGenRegisterInfo.inc"
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static MCAsmInfo *createVEMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT,
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const MCTargetOptions &Options) {
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MCAsmInfo *MAI = new VEELFMCAsmInfo(TT);
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unsigned Reg = MRI.getDwarfRegNum(VE::SX11, true);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, Reg, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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static MCInstrInfo *createVEMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitVEMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createVEMCRegisterInfo(const Triple &TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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InitVEMCRegisterInfo(X, VE::SX10);
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return X;
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}
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static MCSubtargetInfo *createVEMCSubtargetInfo(const Triple &TT, StringRef CPU,
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StringRef FS) {
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if (CPU.empty())
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CPU = "generic";
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return createVEMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, FS);
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}
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static MCTargetStreamer *
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createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
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return new VETargetELFStreamer(S);
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}
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static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
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formatted_raw_ostream &OS,
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MCInstPrinter *InstPrint,
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bool isVerboseAsm) {
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return new VETargetAsmStreamer(S, OS);
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}
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static MCInstPrinter *createVEMCInstPrinter(const Triple &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI) {
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return new VEInstPrinter(MAI, MII, MRI);
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}
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeVETargetMC() {
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// Register the MC asm info.
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RegisterMCAsmInfoFn X(getTheVETarget(), createVEMCAsmInfo);
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for (Target *T : {&getTheVETarget()}) {
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(*T, createVEMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(*T, createVEMCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(*T, createVEMCSubtargetInfo);
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// Register the MC Code Emitter.
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TargetRegistry::RegisterMCCodeEmitter(*T, createVEMCCodeEmitter);
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// Register the asm backend.
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TargetRegistry::RegisterMCAsmBackend(*T, createVEAsmBackend);
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// Register the object target streamer.
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TargetRegistry::RegisterObjectTargetStreamer(*T,
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createObjectTargetStreamer);
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// Register the asm streamer.
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TargetRegistry::RegisterAsmTargetStreamer(*T, createTargetAsmStreamer);
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// Register the MCInstPrinter
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TargetRegistry::RegisterMCInstPrinter(*T, createVEMCInstPrinter);
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}
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}
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