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llvm-project/llvm/test/CodeGen/AVR/pseudo
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Ben Shi bce2e208e0 [AVR] Optimize int16 airthmetic right shift for shift amount 7/14/15 
Reviewed By: aykevl

Differential Revision: https://reviews.llvm.org/D115618
2022-03-26 06:53:27 +00:00
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ADCWRdRr.mir
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ASRBNRd.mir
[AVR][NFC] Fix incorrect register states in expanding pseudo instructions
2022-03-25 16:02:15 +00:00
ASRWNRd.mir
[AVR] Optimize int16 airthmetic right shift for shift amount 7/14/15
2022-03-26 06:53:27 +00:00
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LSLBNRd.mir
[AVR][NFC] Fix incorrect register states in expanding pseudo instructions
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LSLWNRd.mir
[AVR][NFC] Fix incorrect register states in expanding pseudo instructions
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LSRBNRd.mir
[AVR][NFC] Fix incorrect register states in expanding pseudo instructions
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[AVR][NFC] Fix incorrect register states in expanding pseudo instructions
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NEGWRd.mir
[AVR][NFC] Fix incorrect register states in expanding pseudo instructions
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[AVR][NFC] Fix incorrect register states in expanding pseudo instructions
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ZEXT.mir
[AVR][NFC] Fix incorrect register states in expanding pseudo instructions
2022-03-25 16:02:15 +00:00