Min-Yih Hsu 37e309f163

[AArch64][LoopIdiom] Generalize AArch64LoopIdiomTransform into LoopIdiomVectorize (#94081) ...

To facilitate sharing LoopIdiomTransform between AArch64 and RISC-V,
this first patch moves AArch64LoopIdiomTransform from lib/Target/AArch64
to lib/Transforms/Vectorize and renames it to LoopIdiomVectorize. The
following patch (#94082) will teach LoopIdiomVectorize how to generate VP
intrinsics (in addition to the current masked vector style) in favor of
RVV.

2024-06-07 14:06:11 -07:00

..

AsmParser

[ARM64EC] Warn on using disallowed registers in assembly src. (#93618)

2024-06-03 16:33:59 -07:00

Disassembler

[AArch64] Remove copy in SVE/SME predicate spill and fill (#81716)

2024-04-09 16:17:27 +01:00

GISel

[arm64] Add tan intrinsic lowering (#94545)

2024-06-07 09:42:06 -04:00

MCTargetDesc

[llvm-mca][AArch64] Add AArch64 version of clearsSuperRegisters. (#92548)

2024-05-22 15:31:35 +01:00

TargetInfo

…

Utils

[AArch64][SME] Allow memory operations lowering to custom SME functions. (#79263)

2024-04-09 17:27:46 +01:00

AArch64.h

[AArch64][LoopIdiom] Generalize AArch64LoopIdiomTransform into LoopIdiomVectorize (#94081)

2024-06-07 14:06:11 -07:00

AArch64.td

[AArch64] Add support for Qualcomm Oryon processor (#91022)

2024-06-06 07:27:50 -07:00

AArch64A53Fix835769.cpp

…

AArch64A57FPLoadBalancing.cpp

[llvm] Stop including llvm/ADT/BitVector.h (NFC)

2023-11-11 13:24:01 -08:00

AArch64AdvSIMDScalarPass.cpp

…

AArch64Arm64ECCallLowering.cpp

[Arm64EC] Correctly handle sret in entry thunks. (#92326)

2024-05-16 09:15:17 -07:00

AArch64AsmPrinter.cpp

[AArch64][PAC] Lower authenticated calls with ptrauth bundles. (#85736)

2024-05-31 14:08:10 -07:00

AArch64BranchTargets.cpp

…

AArch64CallingConvention.cpp

[AArch64][SVE] Lower function arguments in types of arrays of predicates (#90122)

2024-05-24 10:09:49 -07:00

AArch64CallingConvention.h

[AArch64] Support preserve_none calling convention (#91046)

2024-06-03 18:42:08 -04:00

AArch64CallingConvention.td

[AArch64][SME] Add calling convention for __arm_get_current_vg (#93963)

2024-06-06 11:02:19 +01:00

AArch64CleanupLocalDynamicTLSPass.cpp

…

AArch64CollectLOH.cpp

[Target] Remove unnecessary includes (NFC)

2023-12-07 21:03:56 -08:00

AArch64Combine.td

[AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (#90964)

2024-05-29 15:15:53 +01:00

AArch64CompressJumpTables.cpp

…

AArch64CondBrTuning.cpp

…

AArch64ConditionalCompares.cpp

[CodeGen] Make the parameter TRI required in some functions. (#85968)

2024-04-24 14:24:14 +01:00

AArch64ConditionOptimizer.cpp

[CodeGen] Make the parameter TRI required in some functions. (#85968)

2024-04-24 14:24:14 +01:00

AArch64DeadRegisterDefinitionsPass.cpp

[CodeGen] Make the parameter TRI required in some functions. (#85968)

2024-04-24 14:24:14 +01:00

AArch64ExpandImm.cpp

[AArch64] Optimize MOV to ORR when load symmetric constants (#86249)

2024-05-20 09:57:50 +01:00

AArch64ExpandImm.h

…

AArch64ExpandPseudoInsts.cpp

[AArch64][PAC] Lower authenticated calls with ptrauth bundles. (#85736)

2024-05-31 14:08:10 -07:00

AArch64FalkorHWPFFix.cpp

[Target] Remove unnecessary includes (NFC)

2023-12-07 21:03:56 -08:00

AArch64FastISel.cpp

[arm64] Add tan intrinsic lowering (#94545)

2024-06-07 09:42:06 -04:00

AArch64Features.td

[AArch64] Fix feature flags dependecies (#90612)

2024-05-22 10:50:22 +01:00

AArch64FrameLowering.cpp

Reapply "[MTE] add stack frame history buffer"

2024-05-29 13:02:58 -07:00

AArch64FrameLowering.h

[AArch64] Stack probing for function prologues (#66524)

2023-11-30 17:41:51 +00:00

AArch64GenRegisterBankInfo.def

[GISel] Make target's PartMapping, ValueMapping, and BankIDToCopyMapIdx arrays const. (#71079)

2023-11-09 17:03:56 -08:00

AArch64GlobalsTagging.cpp

[MTE] Disable all MTE protection of globals in sections (#78443)

2024-01-22 11:55:39 +01:00

AArch64InstrAtomics.td

[AArch64][GlobalISel] Legalize Insert vector element (#81453)

2024-04-08 08:44:13 +01:00

AArch64InstrFormats.td

[AArch64][GlobalISel] Legalize Insert vector element (#81453)

2024-04-08 08:44:13 +01:00

AArch64InstrGISel.td

[GlobalISel][AArch64] Combine Vector Reduction Add Long (#76241)

2024-01-22 10:05:37 +00:00

AArch64InstrInfo.cpp

[ARM] Avoid reference into modified vector (#93965)

2024-06-03 17:10:35 +02:00

AArch64InstrInfo.h

[llvm][AArch64] Add missing default cases (#89930)

2024-04-24 11:04:28 -07:00

AArch64InstrInfo.td

[AArch64] Add patterns for fadd(uzp1(x,y), uzp2(x, y)) -> faddp.

2024-06-07 18:19:32 +01:00

AArch64ISelDAGToDAG.cpp

Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)

2024-06-04 08:10:58 +08:00

AArch64ISelLowering.cpp

[arm64] Add tan intrinsic lowering (#94545)

2024-06-07 09:42:06 -04:00

AArch64ISelLowering.h

[AArch64][PAC] Lower authenticated calls with ptrauth bundles. (#85736)

2024-05-31 14:08:10 -07:00

AArch64LoadStoreOptimizer.cpp

[CodeGen] Use LocationSize for MMO getSize (#84751)

2024-03-17 18:15:56 +00:00

AArch64LowerHomogeneousPrologEpilog.cpp

[CodeGen] Do not pass MF into MachineRegisterInfo methods. NFC. (#84770)

2024-03-11 15:35:05 +00:00

AArch64MachineFunctionInfo.cpp

[Target] Use StringRef::operator== instead of StringRef::equals (NFC) (#91072) (#91138)

2024-05-05 13:43:10 -07:00

AArch64MachineFunctionInfo.h

[LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (#77665)

2024-05-17 09:25:21 +01:00

AArch64MachineScheduler.cpp

…

AArch64MachineScheduler.h

…

AArch64MacroFusion.cpp

[CodeGen] Make the parameter TRI required in some functions. (#85968)

2024-04-24 14:24:14 +01:00

AArch64MacroFusion.h

…

AArch64MCInstLower.cpp

[llvm-lib][Object] Add support for EC importlib symbols. (#81059)

2024-02-10 12:46:42 +01:00

AArch64MCInstLower.h

Arm64EC entry/exit thunks, consolidated. (#79067)

2024-01-22 21:28:07 -08:00

AArch64MIPeepholeOpt.cpp

[AArch64] Clear kill flags when removing FMOVDr. (#86308)

2024-03-27 18:36:02 +00:00

AArch64PBQPRegAlloc.cpp

…

AArch64PBQPRegAlloc.h

…

AArch64PerfectShuffle.h

[AArch64][GlobalISel] Common some shuffle mask functions.

2024-05-06 18:37:04 +01:00

AArch64PfmCounters.td

…

AArch64PointerAuth.cpp

[AArch64][PAC] Fix creating check instructions for BBs without an epilog (#92508)

2024-05-27 14:11:21 -07:00

AArch64PointerAuth.h

[AArch64][PAC][NFC] Make checkAuthenticatedRegister() return void (#92507)

2024-05-21 13:19:21 -07:00

AArch64PostCoalescerPass.cpp

[AArch64][SME] Create new pass to remove COALESCER_BARRIER early. (#85386)

2024-04-15 15:07:20 +01:00

AArch64Processors.td

[AArch64] Add support for Qualcomm Oryon processor (#91022)

2024-06-06 07:27:50 -07:00

AArch64PromoteConstant.cpp

…

AArch64RedundantCopyElimination.cpp

[CodeGen] Make the parameter TRI required in some functions. (#85968)

2024-04-24 14:24:14 +01:00

AArch64RegisterBanks.td

[AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (#92130)

2024-05-30 09:10:43 +01:00

AArch64RegisterInfo.cpp

[AArch64][SME] Add calling convention for __arm_get_current_vg (#93963)

2024-06-06 11:02:19 +01:00

AArch64RegisterInfo.h

[MachineLICM] Give opportunity to analyze physregs for invariance. (#84779)

2024-03-15 09:30:46 +00:00

AArch64RegisterInfo.td

[AArch64][PAC] Lower authenticated calls with ptrauth bundles. (#85736)

2024-05-31 14:08:10 -07:00

AArch64SchedA53.td

[AArch64] Initial Ampere1B scheduling model (#81341)

2024-02-14 15:23:14 +01:00

AArch64SchedA55.td

[AArch64] Fix postinc operands for Cortex-A55 scheduling

2023-10-10 12:56:33 +01:00

AArch64SchedA57.td

[AArch64] Initial Ampere1B scheduling model (#81341)

2024-02-14 15:23:14 +01:00

AArch64SchedA57WriteRes.td

…

AArch64SchedA64FX.td

[AArch64] Initial Ampere1B scheduling model (#81341)

2024-02-14 15:23:14 +01:00

AArch64SchedA510.td

[AArch64] Update latencies for Cortex-A510 scheduling model (#87293)

2024-04-17 11:42:52 -07:00

AArch64SchedAmpere1.td

[AArch64] Adjust ROBsize for Ampere1/Ampere1A (NFC) (#86330)

2024-03-22 16:29:58 -07:00

AArch64SchedAmpere1B.td

[AArch64] Adjust ROBsize for Ampere1B (NFC) (#86331)

2024-03-22 16:30:12 -07:00

AArch64SchedCyclone.td

[AArch64] Initial Ampere1B scheduling model (#81341)

2024-02-14 15:23:14 +01:00

AArch64SchedExynosM3.td

[AArch64] Initial Ampere1B scheduling model (#81341)

2024-02-14 15:23:14 +01:00

AArch64SchedExynosM4.td

[CodeGenSchedule] Don't allow invalid ReadAdvances to be formed (#82685)

2024-02-26 18:25:21 -08:00

AArch64SchedExynosM5.td

[CodeGenSchedule] Don't allow invalid ReadAdvances to be formed (#82685)

2024-02-26 18:25:21 -08:00

AArch64SchedFalkor.td

[AArch64] Initial Ampere1B scheduling model (#81341)

2024-02-14 15:23:14 +01:00

AArch64SchedFalkorDetails.td

…

AArch64SchedKryo.td

[AArch64] Initial Ampere1B scheduling model (#81341)

2024-02-14 15:23:14 +01:00

AArch64SchedKryoDetails.td

…

AArch64SchedNeoverseN1.td

[AArch64] Initial Ampere1B scheduling model (#81341)

2024-02-14 15:23:14 +01:00

AArch64SchedNeoverseN2.td

[AArch64] Ensure Neoverse-N2 scheduling model includes all SVE pseudos.

2024-03-08 09:52:49 +00:00

AArch64SchedNeoverseV1.td

[AArch64] Correct Neoverse V1 SVE 16-bit sdot/udot schedule pipelines. (#86142)

2024-03-25 11:20:56 +00:00

AArch64SchedNeoverseV2.td

[AArch64] Fix to Neoverse V2 scheduling model (#88130)

2024-04-11 09:32:17 +01:00

AArch64SchedOryon.td

[AArch64] Add support for Qualcomm Oryon processor (#91022)

2024-06-06 07:27:50 -07:00

AArch64SchedPredExynos.td

…

AArch64SchedPredicates.td

…

AArch64SchedPredNeoverse.td

…

AArch64SchedThunderX2T99.td

[AArch64] Initial Ampere1B scheduling model (#81341)

2024-02-14 15:23:14 +01:00

AArch64SchedThunderX3T110.td

[AArch64] Initial Ampere1B scheduling model (#81341)

2024-02-14 15:23:14 +01:00

AArch64SchedThunderX.td

[AArch64] Initial Ampere1B scheduling model (#81341)

2024-02-14 15:23:14 +01:00

AArch64SchedTSV110.td

[AArch64] Fix sched model for TSV110 core. (#82343)

2024-02-22 13:01:37 +03:00

AArch64Schedule.td

…

AArch64SelectionDAGInfo.cpp

[AArch64][SME] Allow memory operations lowering to custom SME functions. (#79263)

2024-04-09 17:27:46 +01:00

AArch64SelectionDAGInfo.h

[AArch64][SME] Allow memory operations lowering to custom SME functions. (#79263)

2024-04-09 17:27:46 +01:00

AArch64SIMDInstrOpt.cpp

[CodeGen] Make some includes explicit (NFC)

2023-11-24 14:43:18 +01:00

AArch64SLSHardening.cpp

[AArch64] Move SLS later in pass pipeline (#84210)

2024-03-07 09:28:49 +00:00

AArch64SMEInstrInfo.td

[AArch64] Add intrinsics for multi-vector to ZA array vector accumulators (#91606)

2024-05-17 15:02:53 +01:00

AArch64SpeculationHardening.cpp

[RegScavenger] Simplify state tracking for backwards scavenging (#71202)

2023-11-08 09:49:07 +00:00

AArch64StackTagging.cpp

[MTE] rename RecordStackHistoryMode

2024-05-30 12:39:39 -07:00

AArch64StackTaggingPreRA.cpp

[llvm] Stop including llvm/ADT/DepthFirstIterator.h (NFC)

2023-10-22 12:15:46 -07:00

AArch64StorePairSuppress.cpp

[AArch64] Fix resource length computation for STP. (#81749)

2024-02-16 16:10:10 +00:00

AArch64Subtarget.cpp

[AArch64] Add support for Qualcomm Oryon processor (#91022)

2024-06-06 07:27:50 -07:00

AArch64Subtarget.h

[AArch64] NFC: Rename -force-streaming-compatible-sve to -force-streaming-compatible (#92774)

2024-05-22 07:58:54 +01:00

AArch64SVEInstrInfo.td

[AArch64] Improve code generation for experimental.cttz.elts (#91505)

2024-05-14 09:49:53 +01:00

AArch64SystemOperands.td

[AArch64] Fix feature flags dependecies (#90612)

2024-05-22 10:50:22 +01:00

AArch64TargetMachine.cpp

[AArch64][LoopIdiom] Generalize AArch64LoopIdiomTransform into LoopIdiomVectorize (#94081)

2024-06-07 14:06:11 -07:00

AArch64TargetMachine.h

[AArch64][LoopIdiom] Generalize AArch64LoopIdiomTransform into LoopIdiomVectorize (#94081)

2024-06-07 14:06:11 -07:00

AArch64TargetObjectFile.cpp

Revert "Test commit"

2024-06-05 17:40:52 -07:00

AArch64TargetObjectFile.h

[llvm] Indirect symbol replacement with GOTPCREL for aarch64 and risc… (#78003)

2024-01-16 15:32:35 -08:00

AArch64TargetTransformInfo.cpp

[AArch64] Override isLSRCostLess, take number of instructions into account (#84189)

2024-06-06 14:45:36 +01:00

AArch64TargetTransformInfo.h

[AArch64] Override isLSRCostLess, take number of instructions into account (#84189)

2024-06-06 14:45:36 +01:00

CMakeLists.txt

[AArch64][LoopIdiom] Generalize AArch64LoopIdiomTransform into LoopIdiomVectorize (#94081)

2024-06-07 14:06:11 -07:00

SMEABIPass.cpp

[AArch64] Replace LLVM IR function attributes for PSTATE.ZA. (#79166)

2024-02-01 13:37:37 +00:00

SMEInstrFormats.td

[AArch64][SME] Add intrinsics for vector groups ZERO (#93201)

2024-05-29 11:35:21 +01:00

SVEInstrFormats.td

[LLVM][CodeGen][SVE] Clean up lowering of VECTOR_SPLICE operations. (#91330)

2024-05-10 10:53:57 +01:00

SVEIntrinsicOpts.cpp

Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678)

2024-03-10 20:00:13 -07:00