llvm-project/llvm/test/CodeGen/ARM/struct-byval-loop.ll
Jay Foad 496766840f [ARM] Add a regression test for D154281
This is a reduced version of one of the tests that was broken by the
original commit of D154281 "[CodeGen] Store SP adjustment in
MachineBasicBlock. NFCI.".

Differential Revision: https://reviews.llvm.org/D155471
2023-07-19 10:32:21 +01:00

40 lines
1.1 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; RUN: llc -mtriple=arm--none-eabi < %s | FileCheck %s
%t = type [20 x i32]
declare void @func(ptr, ptr byval(%t))
define void @main() {
; CHECK-LABEL: main:
; CHECK: @ %bb.0:
; CHECK-NEXT: .save {r11, lr}
; CHECK-NEXT: push {r11, lr}
; CHECK-NEXT: .pad #152
; CHECK-NEXT: sub sp, sp, #152
; CHECK-NEXT: add r0, sp, #72
; CHECK-NEXT: ldr r1, .LCPI0_0
; CHECK-NEXT: add r0, r0, #12
; CHECK-NEXT: mov r2, sp
; CHECK-NEXT: .LBB0_1: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldr r3, [r0], #4
; CHECK-NEXT: subs r1, r1, #4
; CHECK-NEXT: str r3, [r2], #4
; CHECK-NEXT: bne .LBB0_1
; CHECK-NEXT: @ %bb.2:
; CHECK-NEXT: add r3, sp, #72
; CHECK-NEXT: mov r0, #0
; CHECK-NEXT: ldm r3, {r1, r2, r3}
; CHECK-NEXT: bl func
; CHECK-NEXT: add sp, sp, #152
; CHECK-NEXT: pop {r11, lr}
; CHECK-NEXT: mov pc, lr
; CHECK-NEXT: .p2align 2
; CHECK-NEXT: @ %bb.3:
; CHECK-NEXT: .LCPI0_0:
; CHECK-NEXT: .long 68 @ 0x44
%a = alloca %t
call void @func(ptr null, ptr %a)
ret void
}