Brox Chen a82e3a1925

[AMDGPU] add back the true16 pattern for cvt_pk_rtz (#184857) ...

I found that the `SupportedRoundMode` pattern for true16 mode is removed
in https://github.com/llvm/llvm-project/pull/177069 by mistake. Added it
back in this patch and add gfx11 to the test which runs true16 mode

2026-03-05 16:35:15 -05:00

..

AArch64

[SelectionDAG] Fix cycle in ReplacedValues during type legalization (#184697)

2026-03-05 09:37:59 -08:00

AMDGPU

[AMDGPU] add back the true16 pattern for cvt_pk_rtz (#184857)

2026-03-05 16:35:15 -05:00

ARC

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ARM

[SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (#184590)

2026-03-05 08:47:01 +00:00

AVR

[AVR] Fix SETUGT during 128b -> 64b lowering (#182690)

2026-02-23 19:30:04 +01:00

BPF

[llvm-objdump] Default --symbolize-operands for BPF (#184043)

2026-03-05 08:55:51 +00:00

CSKY

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DirectX

[HLSL] Add WaveActiveAllEqual functions (#183634)

2026-03-04 10:37:22 -08:00

Generic

[CodeGen] Add tests for ShadowStackGCLowering IR pass (#183167)

2026-02-25 16:18:49 -05:00

Hexagon

[Hexagon] Fix memory type for vgather intrinsics (#183563)

2026-02-26 16:47:12 -06:00

Inputs

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Lanai

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LoongArch

[DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (#183032)

2026-02-25 10:03:15 +00:00

M68k

[M68k] Update llvm/test/CodeGen/M68k/pipeline.ll (#182809)

2026-02-23 17:50:43 +08:00

Mips

[Mips] Remove NoNaNsFPMath uses (#183045)

2026-02-26 18:49:16 +08:00

MIR

[AMDGPU] Remove DX10_CLAMP and IEEE bits from gfx1170 (#182107)

2026-03-04 12:16:41 +01:00

MIR2Vec

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MLRegAlloc

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MSP430

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NVPTX

[NVPTX] Remove NoNaNsFPMath uses (#183447)

2026-03-05 20:50:05 +08:00

PowerPC

[AIX] Sort relocations in XCOFF object writer. (#180807)

2026-03-04 12:25:11 -05:00

RISCV

[RISCV] Use SSLAI for XLen saturating shift left by immediate on RV32. (#184848)

2026-03-05 12:41:19 -08:00

SPARC

[SPARC] Set how many bytes load from or store to stack slot (#182674)

2026-02-22 20:20:54 +08:00

SPIRV

Reapply "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (#179268)) (#182552)

2026-03-05 12:41:20 +01:00

SystemZ

[SystemZ] Mark fminimumnum/fmaximumnum as legal (#184595)

2026-03-05 09:03:55 +01:00

Thumb

[ARM] Explicitly mark certain instructions as having no side effects. (#182771)

2026-03-01 09:33:58 +00:00

Thumb2

[CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (#182000)

2026-03-04 17:49:11 +00:00

VE

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WebAssembly

[WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (#184441)

2026-03-05 11:13:43 -08:00

WinCFGuard

[win] Control Flow Guard: Don't set the GuardCF COFF feature if the checks are missing (#182205)

2026-02-19 10:21:53 -08:00

WinEH

[NewPM] Port x86-winehstate (#180687)

2026-02-10 18:50:34 -08:00

X86

[X86] add i256/i512 bit manipulation tests suggested by #132601 (#184813)

2026-03-05 16:13:56 +00:00

XCore

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Xtensa

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