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llvm-project/llvm/test/CodeGen/MIR/X86
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Carlos Alberto Enciso bc9d5b01d3
[clang][DebugInfo] Add virtuality call-site target information in DWARF. (#182510) 
Given the test case:

  struct CBase {
    virtual void foo();
  };

  void bar(CBase *Base) {
    Base->foo();
  }

and using '-emit-call-site-info' with llc, the following DWARF
is produced for the indirect call 'Base->foo()':

1$: DW_TAG_structure_type "CBase"
      ...
2$:   DW_TAG_subprogram "foo"
        ...

3$: DW_TAG_subprogram "bar"
      ...
4$:   DW_TAG_call_site
        ...

We add DW_AT_LLVM_virtual_call_origin to existing call-site
information, linking indirect calls to the function-declaration
they correspond to.

4$:   DW_TAG_call_site
        ...
        DW_AT_LLVM_virtual_call_origin (2$ "_ZN5CBase3fooEv")

The new attribute DW_AT_LLVM_virtual_call_origin helps to
address the ambiguity to any consumer due to the usage of
DW_AT_call_origin.

The functionality is available to all supported debuggers and
it is generated only for DWARF version 5 or greater.
2026-02-25 05:35:07 +00:00
..
auto-successor.mir
…
basic-block-liveins.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
basic-block-not-at-start-of-line-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
block-address-operands.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
branch-folder-with-debug.mir
…
branch-folder-with-label.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
branch-probabilities.mir
…
call-site-info-ambiguous-indirect-call-typeid.mir
Reapply "[llvm] Add CalleeTypeIds field to CallSiteInfo" (#150335) (#150990)
2025-07-28 13:34:26 -07:00
call-site-info-direct-calls-typeid.mir
Reapply "[llvm] Add CalleeTypeIds field to CallSiteInfo" (#150335) (#150990)
2025-07-28 13:34:26 -07:00
call-site-info-error1.mir
Reapply "[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)" (#122777)
2025-01-13 14:00:14 -08:00
call-site-info-error2.mir
Reapply "[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)" (#122777)
2025-01-13 14:00:14 -08:00
call-site-info-error3.mir
…
call-site-info-error4.mir
…
call-site-info-typeid.mir
Reapply "[llvm] Add CalleeTypeIds field to CallSiteInfo" (#150335) (#150990)
2025-07-28 13:34:26 -07:00
callee-saved-info.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
callsite-emit-calleetypeid.ll
[clang][DebugInfo] Add virtuality call-site target information in DWARF. (#182510)
2026-02-25 05:35:07 +00:00
cfi-def-cfa-offset.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
cfi-def-cfa-register.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
cfi-offset.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
constant-pool-item-redefinition-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
constant-pool.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
constant-value-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
copyIRflags.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
dbg-value-list.mir
MIR: Replace undef with poison in some MIR tests (#131282)
2025-03-15 00:20:18 +07:00
dead-register-flag.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
def-register-already-tied-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
diexpr-win32.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
duplicate-memory-operand-flag.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
duplicate-register-flag-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
early-clobber-register-flag.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
empty0.mir
…
empty1.mir
…
empty2.mir
…
escape-function-name.ll
…
exception-function-state.mir
[win] NFC: Rename EHCatchret to EHCont to allow for EH Continuation targets that aren't catchret instructions (#129953)
2025-03-06 09:28:44 -08:00
expected-align-in-memory-operand.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-alignment-after-align-in-memory-operand.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-basic-block-at-start-of-body.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-block-reference-in-blockaddress.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-comma-after-cfi-register.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-comma-after-memory-operand.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-different-implicit-operand.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-different-implicit-register-flag.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-function-reference-after-blockaddress.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-global-value-after-blockaddress.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-integer-after-offset-sign.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-integer-after-tied-def.mir
[CodeGen] Refactor register operand parsing in MI parser (#181748)
2026-02-18 06:48:06 -08:00
expected-integer-in-successor-weight.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-load-or-store-in-memory-operand.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-machine-operand.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-metadata-node-after-debug-location.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-metadata-node-after-exclaim.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-metadata-node-in-stack-object.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-named-register-in-allocation-hint.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-named-register-in-callee-saved-register.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-named-register-in-functions-livein.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-named-register-livein.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-newline-at-end-of-list.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-number-after-bb.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-offset-after-cfi-operand.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-pointer-value-in-memory-operand.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-positive-alignment-after-align.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-power-of-2-after-align.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-register-after-cfi-operand.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-register-after-flags.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-size-integer-after-memory-operation2.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-size-integer-after-memory-operation.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-stack-object-function-context.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-stack-object.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-subregister-after-colon.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-target-flag-name.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-value-in-memory-operand.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
expected-virtual-register-in-functions-livein.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
external-symbol-operands.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
fake-use-tailcall.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
fastmath.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
fixed-stack-di.mir
…
fixed-stack-memory-operands.mir
[test] Change llc -march= to -mtriple=
2024-12-15 13:08:02 -08:00
fixed-stack-object-redefinition-error.mir
[test] Change llc -march= to -mtriple=
2024-12-15 13:08:02 -08:00
fixed-stack-objects.mir
[test] Change llc -march= to -mtriple=
2024-12-15 13:08:02 -08:00
frame-info-multiple-save-restore-points-parse.mir
[MIR] Support save/restore points with independent sets of registers (#119358)
2025-09-23 11:54:52 +03:00
frame-info-save-restore-points-with-regs-parse.mir
[MIR][NFC] Build fix after 1132e82 (#160273)
2025-09-23 15:58:42 +03:00
frame-info-save-restore-points.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
frame-info-stack-references.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
frame-setup-instruction-flag.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
function-liveins.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
generic-instr-type.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
global-value-operands.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
immediate-operands.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
implicit-register-flag.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
inline-asm-registers.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
inline-asm-rm-exhaustion.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
inline-asm.mir
…
instr-cfi-type.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
instr-heap-alloc-operands.mir
MIR: Replace undef with poison in some MIR tests (#131282)
2025-03-15 00:20:18 +07:00
instr-pcsections.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
instr-symbols-and-mcsymbol-operands.mir
MIR: Replace undef with poison in some MIR tests (#131282)
2025-03-15 00:20:18 +07:00
instructions-debug-location.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
invalid-constant-pool-item.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
invalid-debug-location.mir
…
invalid-metadata-node-type.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
invalid-target-flag-name.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
invalid-tied-def-index-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
invalid-tied-physical-reg-def.mir
[CodeGen] Refactor register operand parsing in MI parser (#181748)
2026-02-18 06:48:06 -08:00
invalid-type-physical-reg.mir
[CodeGen] Refactor register operand parsing in MI parser (#181748)
2026-02-18 06:48:06 -08:00
jump-table-info.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
jump-table-redefinition-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
killed-register-flag.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
large-cfi-offset-number-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
large-immediate-operand-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
large-index-number-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
large-offset-number-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
large-size-in-memory-operand-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
lit.local.cfg
…
liveout-register-mask.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
load-with-max-alignment.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
machine-basic-block-operands.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
machine-instructions.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
machine-metadata-error.mir
…
machine-metadata.mir
…
machine-verifier-address.mir
MIR: Replace undef with poison in some MIR tests (#131282)
2025-03-15 00:20:18 +07:00
machine-verifier.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
memory-operands.mir
MIR: Replace undef with poison in some MIR tests (#131282)
2025-03-15 00:20:18 +07:00
metadata-operands.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
mir-canon-hash-bb.mir
…
mir-namer-hash-frameindex.mir
…
mircanon-flags.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
missing-closing-quote.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
missing-comma.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
missing-implicit-operand.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
named-registers.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
newline-handling.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
null-register-operands.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
pr38773.mir
…
pr126107.mir
MachineCopyPropagation: Do not remove copies preserved by regmask (#125868)
2025-02-10 12:26:33 -05:00
register-mask-operands.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
register-operand-class-invalid0.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
register-operand-class-invalid1.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
register-operand-class.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
register-operands-target-flag-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
renamable-register-flag.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
roundtrip.mir
…
simple-register-allocation-hints.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
spill-slot-fixed-stack-object-aliased.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
spill-slot-fixed-stack-object-immutable.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
spill-slot-fixed-stack-objects.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
stack-object-debug-info.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
stack-object-invalid-name.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
stack-object-operand-name-mismatch-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
stack-object-operands.mir
[test] Change llc -march= to -mtriple=
2024-12-15 13:08:02 -08:00
stack-object-redefinition-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
stack-objects.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
standalone-register-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
subreg-on-physreg.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
subregister-index-operands.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
subregister-operands.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
successor-basic-blocks-weights.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
successor-basic-blocks.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
tail-merging-preserve-debugloc.mir
…
tied-def-operand-invalid.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
tied-physical-regs-match.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
undef-register-flag.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
undefined-fixed-stack-object.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
undefined-global-value.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
undefined-ir-block-in-blockaddress.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
undefined-ir-block-slot-in-blockaddress.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
undefined-jump-table-id.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
undefined-named-global-value.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
undefined-register-class.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
undefined-stack-object.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
undefined-value-in-memory-operand.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
undefined-virtual-register.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
unexpected-type-phys.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
unknown-instruction.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
unknown-machine-basic-block.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
unknown-metadata-keyword.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
unknown-metadata-node.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
unknown-named-machine-basic-block.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
unknown-register.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
unknown-subregister-index-op.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
unknown-subregister-index.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
unreachable_block.ll
MIR: Replace undef with poison in some MIR tests (#131282)
2025-03-15 00:20:18 +07:00
unreachable-block-print.mir
…
unrecognized-character.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
variable-sized-stack-object-size-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
variable-sized-stack-objects.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
virtual-register-redefinition-error.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
virtual-registers.mir
[MIR,test] Change llc -march=x86-64 to -mtriple=x86_64
2024-12-15 11:23:08 -08:00
zero-probability.mir
…