116ab78694
The register R1 is defined to have the constant value 0 in the avr-gcc calling convention (which we follow). Unfortunately, we don't really make use of it. This patch replaces `LDI 0` instructions with a copy from R1. This reduces code size: my AVR build of compiler-rt goes from 50660 to 50240 bytes of code size, which is a 0.8% reduction. Presumably it will also improve execution speed, although I didn't measure this. Differential Revision: https://reviews.llvm.org/D117425
27 lines
848 B
LLVM
27 lines
848 B
LLVM
; RUN: llc -mattr=avr6 < %s -march=avr | FileCheck %s
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define i1 @signed_multiplication_did_overflow(i8, i8) unnamed_addr {
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; CHECK-LABEL: signed_multiplication_did_overflow:
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entry-block:
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%2 = tail call { i8, i1 } @llvm.smul.with.overflow.i8(i8 %0, i8 %1)
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%3 = extractvalue { i8, i1 } %2, 1
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ret i1 %3
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; Multiply, fill the low byte with the sign of the low byte via
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; arithmetic shifting, compare it to the high byte.
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;
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; CHECK: muls r24, r22
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; CHECK: mov [[HIGH:r[0-9]+]], r1
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; CHECK: mov [[LOW:r[0-9]+]], r0
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; CHECK: lsl {{.*}}[[LOW]]
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; CHECK: sbc {{.*}}[[LOW]], {{.*}}[[LOW]]
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; CHECK: ldi [[RET:r[0-9]+]], 1
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; CHECK: cp {{.*}}[[HIGH]], {{.*}}[[LOW]]
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; CHECK: brne [[LABEL:.LBB[_0-9]+]]
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; CHECK: mov {{.*}}[[RET]], r1
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; CHECK: {{.*}}[[LABEL]]
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; CHECK: ret
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}
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declare { i8, i1 } @llvm.smul.with.overflow.i8(i8, i8)
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