
Update TableGen specification of DXIL Op records in DXIL.td per the current design document. - Facilitate specification of overloads, shader stage and attributes predicated on DXIL Ops predicated DXIL version. Implement functionality to consume in TableGen backend, DXILEmitter, the above specification enhancements, and generate C++ code (in (DXILOperations.inc) that represents properties of DXIL Ops, associated type declarations and corresponding accessor functions. Changes to DXIL Op Lowering pass to consume the DXIL Op representation generated by the TableGen back end. Add mtriple with the required shader model version to commandline of tests.
95 lines
3.7 KiB
LLVM
95 lines
3.7 KiB
LLVM
; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
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; Make sure dxil operation function calls for clamp/uclamp are generated for half/float/double/i16/i32/i64.
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; CHECK-LABEL:test_clamp_i16
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define noundef i16 @test_clamp_i16(i16 noundef %a, i16 noundef %b, i16 noundef %c) {
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entry:
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; CHECK: call i16 @dx.op.binary.i16(i32 37, i16 %{{.*}}, i16 %{{.*}})
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; CHECK: call i16 @dx.op.binary.i16(i32 38, i16 %{{.*}}, i16 %{{.*}})
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%0 = call i16 @llvm.dx.clamp.i16(i16 %a, i16 %b, i16 %c)
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ret i16 %0
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}
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; CHECK-LABEL:test_clamp_i32
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define noundef i32 @test_clamp_i32(i32 noundef %a, i32 noundef %b, i32 noundef %c) {
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entry:
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; CHECK: call i32 @dx.op.binary.i32(i32 37, i32 %{{.*}}, i32 %{{.*}})
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; CHECK: call i32 @dx.op.binary.i32(i32 38, i32 %{{.*}}, i32 %{{.*}})
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%0 = call i32 @llvm.dx.clamp.i32(i32 %a, i32 %b, i32 %c)
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ret i32 %0
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}
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; CHECK-LABEL:test_clamp_i64
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define noundef i64 @test_clamp_i64(i64 noundef %a, i64 noundef %b, i64 noundef %c) {
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entry:
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; CHECK: call i64 @dx.op.binary.i64(i32 37, i64 %a, i64 %b)
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; CHECK: call i64 @dx.op.binary.i64(i32 38, i64 %{{.*}}, i64 %c)
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%0 = call i64 @llvm.dx.clamp.i64(i64 %a, i64 %b, i64 %c)
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ret i64 %0
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}
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; CHECK-LABEL:test_clamp_half
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define noundef half @test_clamp_half(half noundef %a, half noundef %b, half noundef %c) {
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entry:
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; CHECK: call half @dx.op.binary.f16(i32 35, half %{{.*}}, half %{{.*}})
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; CHECK: call half @dx.op.binary.f16(i32 36, half %{{.*}}, half %{{.*}})
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%0 = call half @llvm.dx.clamp.f16(half %a, half %b, half %c)
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ret half %0
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}
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; CHECK-LABEL:test_clamp_float
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define noundef float @test_clamp_float(float noundef %a, float noundef %b, float noundef %c) {
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entry:
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; CHECK: call float @dx.op.binary.f32(i32 35, float %{{.*}}, float %{{.*}})
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; CHECK: call float @dx.op.binary.f32(i32 36, float %{{.*}}, float %{{.*}})
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%0 = call float @llvm.dx.clamp.f32(float %a, float %b, float %c)
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ret float %0
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}
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; CHECK-LABEL:test_clamp_double
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define noundef double @test_clamp_double(double noundef %a, double noundef %b, double noundef %c) {
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entry:
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; CHECK: call double @dx.op.binary.f64(i32 35, double %{{.*}}, double %{{.*}})
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; CHECK: call double @dx.op.binary.f64(i32 36, double %{{.*}}, double %{{.*}})
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%0 = call double @llvm.dx.clamp.f64(double %a, double %b, double %c)
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ret double %0
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}
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; CHECK-LABEL:test_uclamp_i16
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define noundef i16 @test_uclamp_i16(i16 noundef %a, i16 noundef %b, i16 noundef %c) {
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entry:
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; CHECK: call i16 @dx.op.binary.i16(i32 39, i16 %{{.*}}, i16 %{{.*}})
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; CHECK: call i16 @dx.op.binary.i16(i32 40, i16 %{{.*}}, i16 %{{.*}})
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%0 = call i16 @llvm.dx.uclamp.i16(i16 %a, i16 %b, i16 %c)
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ret i16 %0
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}
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; CHECK-LABEL:test_uclamp_i32
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define noundef i32 @test_uclamp_i32(i32 noundef %a, i32 noundef %b, i32 noundef %c) {
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entry:
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; CHECK: call i32 @dx.op.binary.i32(i32 39, i32 %{{.*}}, i32 %{{.*}})
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; CHECK: call i32 @dx.op.binary.i32(i32 40, i32 %{{.*}}, i32 %{{.*}})
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%0 = call i32 @llvm.dx.uclamp.i32(i32 %a, i32 %b, i32 %c)
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ret i32 %0
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}
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; CHECK-LABEL:test_uclamp_i64
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define noundef i64 @test_uclamp_i64(i64 noundef %a, i64 noundef %b, i64 noundef %c) {
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entry:
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; CHECK: call i64 @dx.op.binary.i64(i32 39, i64 %a, i64 %b)
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; CHECK: call i64 @dx.op.binary.i64(i32 40, i64 %{{.*}}, i64 %c)
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%0 = call i64 @llvm.dx.uclamp.i64(i64 %a, i64 %b, i64 %c)
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ret i64 %0
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}
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declare half @llvm.dx.clamp.f16(half, half, half)
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declare float @llvm.dx.clamp.f32(float, float, float)
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declare double @llvm.dx.clamp.f64(double, double, double)
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declare i16 @llvm.dx.clamp.i16(i16, i16, i16)
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declare i32 @llvm.dx.clamp.i32(i32, i32, i32)
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declare i64 @llvm.dx.clamp.i64(i64, i64, i64)
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declare i16 @llvm.dx.uclamp.i16(i16, i16, i16)
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declare i32 @llvm.dx.uclamp.i32(i32, i32, i32)
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declare i64 @llvm.dx.uclamp.i64(i64, i64, i64)
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