ba627a32e1
This patch includes the following updates to the load/store refactoring effort introduced in D93370: - Update various VSX patterns that use to "force" an XForm, to instead just XForm. This allows the ability for the patterns to compute the most optimal addressing mode (and to produce a DForm instruction when possible) - Update pattern and test case for the LXVD2X/STXVD2X intrinsics - Update LIT test cases that use to use the XForm instruction to use the DForm instruction Differential Revision: https://reviews.llvm.org/D95115
92 lines
5.5 KiB
LLVM
92 lines
5.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
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; RUN: -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff < %s | \
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; RUN: FileCheck --check-prefix=32BIT %s
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; RUN: llc -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
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; RUN: -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff < %s | \
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; RUN: FileCheck --check-prefix=64BIT %s
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define void @caller() {
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; 32BIT-LABEL: name: caller
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; 32BIT: bb.0.entry:
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; 32BIT: ADJCALLSTACKDOWN 88, 0, implicit-def dead $r1, implicit $r1
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; 32BIT: [[LWZtoc:%[0-9]+]]:gprc = LWZtoc %const.0, $r2 :: (load (s32) from got)
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; 32BIT: [[LXVW4X:%[0-9]+]]:vsrc = LXVW4X $zero, killed [[LWZtoc]] :: (load (s128) from constant-pool)
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; 32BIT: [[LI:%[0-9]+]]:gprc = LI 64
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; 32BIT: STXVW4X killed [[LXVW4X]], $r1, killed [[LI]] :: (store (s128))
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; 32BIT: [[LIS:%[0-9]+]]:gprc = LIS 38314
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; 32BIT: [[ORI:%[0-9]+]]:gprc = ORI killed [[LIS]], 63376
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; 32BIT: STW killed [[ORI]], 84, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
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; 32BIT: [[LIS1:%[0-9]+]]:gprc = LIS 16389
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; 32BIT: [[ORI1:%[0-9]+]]:gprc = ORI killed [[LIS1]], 48905
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; 32BIT: STW killed [[ORI1]], 80, $r1 :: (store (s32), align 8)
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; 32BIT: [[LWZtoc1:%[0-9]+]]:gprc = LWZtoc %const.1, $r2 :: (load (s32) from got)
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; 32BIT: [[LXVW4X1:%[0-9]+]]:vsrc = LXVW4X $zero, killed [[LWZtoc1]] :: (load (s128) from constant-pool)
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; 32BIT: [[LWZtoc2:%[0-9]+]]:gprc_and_gprc_nor0 = LWZtoc %const.2, $r2 :: (load (s32) from got)
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; 32BIT: [[LFD:%[0-9]+]]:f8rc = LFD 0, killed [[LWZtoc2]] :: (load (s64) from constant-pool)
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; 32BIT: [[LIS2:%[0-9]+]]:gprc = LIS 16393
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; 32BIT: [[ORI2:%[0-9]+]]:gprc = ORI killed [[LIS2]], 8697
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; 32BIT: [[LIS3:%[0-9]+]]:gprc = LIS 61467
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; 32BIT: [[ORI3:%[0-9]+]]:gprc = ORI killed [[LIS3]], 34414
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; 32BIT: [[LWZtoc3:%[0-9]+]]:gprc_and_gprc_nor0 = LWZtoc %const.3, $r2 :: (load (s32) from got)
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; 32BIT: [[LFD1:%[0-9]+]]:f8rc = LFD 0, killed [[LWZtoc3]] :: (load (s64) from constant-pool)
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; 32BIT: [[LI1:%[0-9]+]]:gprc = LI 55
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; 32BIT: $r3 = COPY [[LI1]]
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; 32BIT: $v2 = COPY [[LXVW4X1]]
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; 32BIT: $f1 = COPY [[LFD]]
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; 32BIT: $r9 = COPY [[ORI2]]
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; 32BIT: $r10 = COPY [[ORI3]]
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; 32BIT: $f2 = COPY [[LFD1]]
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; 32BIT: BL_NOP <mcsymbol .callee[PR]>, csr_aix32_altivec, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $v2, implicit $f1, implicit $r9, implicit $r10, implicit $f2, implicit $r2, implicit-def $r1, implicit-def $v2
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; 32BIT: ADJCALLSTACKUP 88, 0, implicit-def dead $r1, implicit $r1
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; 32BIT: [[COPY:%[0-9]+]]:vsrc = COPY $v2
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; 32BIT: BLR implicit $lr, implicit $rm
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; 64BIT-LABEL: name: caller
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; 64BIT: bb.0.entry:
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; 64BIT: ADJCALLSTACKDOWN 120, 0, implicit-def dead $r1, implicit $r1
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; 64BIT: [[LDtocCPT:%[0-9]+]]:g8rc = LDtocCPT %const.0, $x2 :: (load (s64) from got)
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; 64BIT: [[LXVW4X:%[0-9]+]]:vsrc = LXVW4X $zero8, killed [[LDtocCPT]] :: (load (s128) from constant-pool)
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; 64BIT: [[LI8_:%[0-9]+]]:g8rc = LI8 96
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; 64BIT: STXVW4X killed [[LXVW4X]], $x1, killed [[LI8_]] :: (store (s128))
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; 64BIT: [[LIS8_:%[0-9]+]]:g8rc = LIS8 16389
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; 64BIT: [[ORI8_:%[0-9]+]]:g8rc = ORI8 killed [[LIS8_]], 48905
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; 64BIT: [[RLDIC:%[0-9]+]]:g8rc = RLDIC killed [[ORI8_]], 32, 1
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; 64BIT: [[ORIS8_:%[0-9]+]]:g8rc = ORIS8 killed [[RLDIC]], 38314
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; 64BIT: [[ORI8_1:%[0-9]+]]:g8rc = ORI8 killed [[ORIS8_]], 63376
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; 64BIT: STD killed [[ORI8_1]], 112, $x1 :: (store (s64))
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; 64BIT: [[LDtocCPT1:%[0-9]+]]:g8rc = LDtocCPT %const.1, $x2 :: (load (s64) from got)
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; 64BIT: [[LXVW4X1:%[0-9]+]]:vsrc = LXVW4X $zero8, killed [[LDtocCPT1]] :: (load (s128) from constant-pool)
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; 64BIT: [[LD:%[0-9]+]]:g8rc = LD 104, $x1 :: (load (s64))
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; 64BIT: [[LD1:%[0-9]+]]:g8rc = LD 96, $x1 :: (load (s64))
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; 64BIT: [[LDtocCPT2:%[0-9]+]]:g8rc_and_g8rc_nox0 = LDtocCPT %const.2, $x2 :: (load (s64) from got)
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; 64BIT: [[LFD:%[0-9]+]]:f8rc = LFD 0, killed [[LDtocCPT2]] :: (load (s64) from constant-pool)
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; 64BIT: [[LDtocCPT3:%[0-9]+]]:g8rc_and_g8rc_nox0 = LDtocCPT %const.3, $x2 :: (load (s64) from got)
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; 64BIT: [[LFD1:%[0-9]+]]:f8rc = LFD 0, killed [[LDtocCPT3]] :: (load (s64) from constant-pool)
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; 64BIT: [[LIS8_1:%[0-9]+]]:g8rc = LIS8 16393
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; 64BIT: [[ORI8_2:%[0-9]+]]:g8rc = ORI8 killed [[LIS8_1]], 8697
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; 64BIT: [[RLDIC1:%[0-9]+]]:g8rc = RLDIC killed [[ORI8_2]], 32, 1
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; 64BIT: [[ORIS8_1:%[0-9]+]]:g8rc = ORIS8 killed [[RLDIC1]], 61467
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; 64BIT: [[ORI8_3:%[0-9]+]]:g8rc = ORI8 killed [[ORIS8_1]], 34414
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; 64BIT: [[LI8_1:%[0-9]+]]:g8rc = LI8 55
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; 64BIT: $x3 = COPY [[LI8_1]]
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; 64BIT: $v2 = COPY [[LXVW4X1]]
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; 64BIT: $f1 = COPY [[LFD]]
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; 64BIT: $x7 = COPY [[ORI8_3]]
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; 64BIT: $x9 = COPY [[LD1]]
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; 64BIT: $x10 = COPY [[LD]]
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; 64BIT: $f2 = COPY [[LFD1]]
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; 64BIT: BL8_NOP <mcsymbol .callee[PR]>, csr_ppc64_altivec, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $v2, implicit $f1, implicit $x7, implicit $x9, implicit $x10, implicit $f2, implicit $x2, implicit-def $r1, implicit-def $v2
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; 64BIT: ADJCALLSTACKUP 120, 0, implicit-def dead $r1, implicit $r1
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; 64BIT: [[COPY:%[0-9]+]]:vsrc = COPY $v2
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; 64BIT: BLR8 implicit $lr8, implicit $rm
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entry:
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%call = tail call <4 x i32> (i32, <4 x i32>, double, ...) @callee(i32 signext 55, <4 x i32> <i32 170, i32 187, i32 204, i32 221>, double 3.141590e+00, <4 x i32> <i32 10, i32 20, i32 30, i32 40>, double 2.718280e+00)
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ret void
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}
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declare <4 x i32> @callee(i32 signext, <4 x i32>, double, ...)
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