2c7786e94a
This is a follow up to 924907bc6, and is mostly motivated by consistency but does include one additional optimization. In general, we prefer 0.0 over -0.0 as the identity value for an fadd. We use that value in several places, but don't in others. So, let's be consistent and use the same identity (when nsz allows) everywhere. This creates a bunch of test churn, but due to 924907bc6, most of that churn doesn't actually indicate a change in codegen. The exception is that this change enables the use of 0.0 for nsz, but *not* reasoc, fadd reductions. Or said differently, it allows the neutral value of an ordered fadd reduction to be 0.0.
158 lines
8.6 KiB
LLVM
158 lines
8.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=loop-vectorize -mtriple=thumbv8-unknown-unknown -mcpu=cortex-a53 -S | FileCheck %s
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; This test is reduced from SPECFP 2006 482.sphinx.
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; We expect vectorization with <2 x double> and <2 x float> ops.
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; See https://bugs.llvm.org/show_bug.cgi?id=36280 for more details.
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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@a = external global i32
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@v = external global i32
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@mm = external global ptr
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@vv = external global ptr
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@ll = external global ptr
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define i32 @test(ptr nocapture readonly %x) {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[T:%.*]] = load i32, ptr @v, align 8
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; CHECK-NEXT: [[T1:%.*]] = load i32, ptr @a, align 4
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; CHECK-NEXT: br label [[OUTERLOOP:%.*]]
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; CHECK: outerloop:
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; CHECK-NEXT: [[T2:%.*]] = phi i32 [ [[V17:%.*]], [[OUTEREND:%.*]] ], [ [[T1]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[J_0136:%.*]] = phi i32 [ [[INC144:%.*]], [[OUTEREND]] ], [ 0, [[ENTRY]] ]
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; CHECK-NEXT: [[SCORE_1135:%.*]] = phi i32 [ [[CALL142:%.*]], [[OUTEREND]] ], [ -939524096, [[ENTRY]] ]
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; CHECK-NEXT: [[T3:%.*]] = load ptr, ptr @mm, align 4
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; CHECK-NEXT: [[ARRAYIDX109:%.*]] = getelementptr inbounds ptr, ptr [[T3]], i32 [[T2]]
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; CHECK-NEXT: [[T4:%.*]] = load ptr, ptr [[ARRAYIDX109]], align 4
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; CHECK-NEXT: [[T5:%.*]] = load ptr, ptr @vv, align 4
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; CHECK-NEXT: [[ARRAYIDX111:%.*]] = getelementptr inbounds ptr, ptr [[T5]], i32 [[T2]]
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; CHECK-NEXT: [[T6:%.*]] = load ptr, ptr [[ARRAYIDX111]], align 4
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; CHECK-NEXT: [[T7:%.*]] = load ptr, ptr @ll, align 4
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; CHECK-NEXT: [[ARRAYIDX113:%.*]] = getelementptr inbounds float, ptr [[T7]], i32 [[T2]]
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; CHECK-NEXT: [[T8:%.*]] = load float, ptr [[ARRAYIDX113]], align 4
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; CHECK-NEXT: [[CONV114:%.*]] = fpext float [[T8]] to double
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[T]], 2
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[T]], 2
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; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[T]], [[N_MOD_VF]]
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> zeroinitializer, double [[CONV114]], i32 0
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x double> [ [[TMP0]], [[VECTOR_PH]] ], [ [[TMP13:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[INDEX]], 0
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[X:%.*]], i32 [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, ptr [[TMP2]], i32 0
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP3]], align 4
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[T4]], i32 [[TMP1]]
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; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[TMP4]], i32 0
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; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x float>, ptr [[TMP5]], align 4
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; CHECK-NEXT: [[TMP6:%.*]] = fsub fast <2 x float> [[WIDE_LOAD]], [[WIDE_LOAD1]]
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; CHECK-NEXT: [[TMP7:%.*]] = fpext <2 x float> [[TMP6]] to <2 x double>
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; CHECK-NEXT: [[TMP8:%.*]] = fmul fast <2 x double> [[TMP7]], [[TMP7]]
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; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, ptr [[T6]], i32 [[TMP1]]
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; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr [[TMP9]], i32 0
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; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <2 x float>, ptr [[TMP10]], align 4
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; CHECK-NEXT: [[TMP11:%.*]] = fpext <2 x float> [[WIDE_LOAD2]] to <2 x double>
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; CHECK-NEXT: [[TMP12:%.*]] = fmul fast <2 x double> [[TMP8]], [[TMP11]]
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; CHECK-NEXT: [[TMP13]] = fsub fast <2 x double> [[VEC_PHI]], [[TMP12]]
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
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; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: [[TMP15:%.*]] = call fast double @llvm.vector.reduce.fadd.v2f64(double 0.000000e+00, <2 x double> [[TMP13]])
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; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[T]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[CMP_N]], label [[OUTEREND]], label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[OUTERLOOP]] ]
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; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi double [ [[TMP15]], [[MIDDLE_BLOCK]] ], [ [[CONV114]], [[OUTERLOOP]] ]
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; CHECK-NEXT: br label [[INNERLOOP:%.*]]
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; CHECK: innerloop:
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; CHECK-NEXT: [[I_2132:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INC129:%.*]], [[INNERLOOP]] ]
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; CHECK-NEXT: [[DVAL1_4131:%.*]] = phi double [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[SUB127:%.*]], [[INNERLOOP]] ]
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; CHECK-NEXT: [[ARRAYIDX119:%.*]] = getelementptr inbounds float, ptr [[X]], i32 [[I_2132]]
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; CHECK-NEXT: [[T9:%.*]] = load float, ptr [[ARRAYIDX119]], align 4
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; CHECK-NEXT: [[ARRAYIDX120:%.*]] = getelementptr inbounds float, ptr [[T4]], i32 [[I_2132]]
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; CHECK-NEXT: [[T10:%.*]] = load float, ptr [[ARRAYIDX120]], align 4
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; CHECK-NEXT: [[SUB121:%.*]] = fsub fast float [[T9]], [[T10]]
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; CHECK-NEXT: [[CONV122:%.*]] = fpext float [[SUB121]] to double
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; CHECK-NEXT: [[MUL123:%.*]] = fmul fast double [[CONV122]], [[CONV122]]
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; CHECK-NEXT: [[ARRAYIDX124:%.*]] = getelementptr inbounds float, ptr [[T6]], i32 [[I_2132]]
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; CHECK-NEXT: [[T11:%.*]] = load float, ptr [[ARRAYIDX124]], align 4
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; CHECK-NEXT: [[CONV125:%.*]] = fpext float [[T11]] to double
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; CHECK-NEXT: [[MUL126:%.*]] = fmul fast double [[MUL123]], [[CONV125]]
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; CHECK-NEXT: [[SUB127]] = fsub fast double [[DVAL1_4131]], [[MUL126]]
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; CHECK-NEXT: [[INC129]] = add nuw nsw i32 [[I_2132]], 1
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; CHECK-NEXT: [[EXITCOND143:%.*]] = icmp eq i32 [[INC129]], [[T]]
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; CHECK-NEXT: br i1 [[EXITCOND143]], label [[OUTEREND]], label [[INNERLOOP]], !llvm.loop [[LOOP3:![0-9]+]]
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; CHECK: outerend:
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; CHECK-NEXT: [[SUB127_LCSSA:%.*]] = phi double [ [[SUB127]], [[INNERLOOP]] ], [ [[TMP15]], [[MIDDLE_BLOCK]] ]
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; CHECK-NEXT: [[CONV138:%.*]] = fptosi double [[SUB127_LCSSA]] to i32
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; CHECK-NEXT: [[CALL142]] = add nuw nsw i32 [[SCORE_1135]], [[CONV138]]
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; CHECK-NEXT: [[INC144]] = add nuw nsw i32 [[J_0136]], 1
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; CHECK-NEXT: [[ARRAYIDX102:%.*]] = getelementptr inbounds i32, ptr @a, i32 [[INC144]]
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; CHECK-NEXT: [[V17]] = load i32, ptr [[ARRAYIDX102]], align 4
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; CHECK-NEXT: [[CMP103:%.*]] = icmp sgt i32 [[V17]], -1
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; CHECK-NEXT: br i1 [[CMP103]], label [[OUTERLOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[CALL142]]
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;
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entry:
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%t = load i32, ptr @v, align 8
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%t1 = load i32, ptr @a, align 4
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br label %outerloop
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outerloop:
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%t2 = phi i32 [ %v17, %outerend ], [ %t1, %entry ]
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%j.0136 = phi i32 [ %inc144, %outerend ], [ 0, %entry ]
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%score.1135 = phi i32 [ %call142, %outerend ], [ -939524096, %entry ]
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%t3 = load ptr, ptr @mm, align 4
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%arrayidx109 = getelementptr inbounds ptr, ptr %t3, i32 %t2
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%t4 = load ptr, ptr %arrayidx109, align 4
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%t5 = load ptr, ptr @vv, align 4
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%arrayidx111 = getelementptr inbounds ptr, ptr %t5, i32 %t2
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%t6 = load ptr, ptr %arrayidx111, align 4
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%t7 = load ptr, ptr @ll, align 4
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%arrayidx113 = getelementptr inbounds float, ptr %t7, i32 %t2
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%t8 = load float, ptr %arrayidx113, align 4
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%conv114 = fpext float %t8 to double
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br label %innerloop
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innerloop:
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%i.2132 = phi i32 [ 0, %outerloop ], [ %inc129, %innerloop ]
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%dval1.4131 = phi double [ %conv114, %outerloop ], [ %sub127, %innerloop ]
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%arrayidx119 = getelementptr inbounds float, ptr %x, i32 %i.2132
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%t9 = load float, ptr %arrayidx119, align 4
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%arrayidx120 = getelementptr inbounds float, ptr %t4, i32 %i.2132
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%t10 = load float, ptr %arrayidx120, align 4
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%sub121 = fsub fast float %t9, %t10
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%conv122 = fpext float %sub121 to double
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%mul123 = fmul fast double %conv122, %conv122
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%arrayidx124 = getelementptr inbounds float, ptr %t6, i32 %i.2132
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%t11 = load float, ptr %arrayidx124, align 4
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%conv125 = fpext float %t11 to double
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%mul126 = fmul fast double %mul123, %conv125
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%sub127 = fsub fast double %dval1.4131, %mul126
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%inc129 = add nuw nsw i32 %i.2132, 1
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%exitcond143 = icmp eq i32 %inc129, %t
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br i1 %exitcond143, label %outerend, label %innerloop
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outerend:
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%sub127.lcssa = phi double [ %sub127, %innerloop ]
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%conv138 = fptosi double %sub127.lcssa to i32
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%call142 = add nuw nsw i32 %score.1135, %conv138
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%inc144 = add nuw nsw i32 %j.0136, 1
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%arrayidx102 = getelementptr inbounds i32, ptr @a, i32 %inc144
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%v17 = load i32, ptr %arrayidx102, align 4
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%cmp103 = icmp sgt i32 %v17, -1
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br i1 %cmp103, label %outerloop, label %exit
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exit:
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ret i32 %call142
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}
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