Luo, Yuanke 6ade6d2511 [Verifier] Relieve intrinsics parameter alignment size constrain
In D121898 we restrict parameter alignment size in IR since DAGISel
only have 4 bits to hold the alignment value. However intrinsics
won't be lowered to call instruction, so we can remove the constrain
for intrinsics.

Differential Revision: https://reviews.llvm.org/D136330
2022-10-21 17:01:20 +08:00
..
2022-08-24 22:41:38 +00:00
2022-08-24 22:41:38 +00:00
2021-03-29 18:04:48 -07:00
2022-02-01 13:07:22 -06:00

This directory contains testcases that the verifier is supposed to detect as
malformed LLVM code.  Testcases for situations that the verifier incorrectly
identifies as malformed should go in the test/Assembler directory.