2a721374ae
Following some recent discussions, this changes the representation
of callbrs in IR. The current blockaddress arguments are replaced
with `!` label constraints that refer directly to callbr indirect
destinations:
; Before:
%res = callbr i8* asm "", "=r,r,i"(i8* %x, i8* blockaddress(@test8, %foo))
to label %asm.fallthrough [label %foo]
; After:
%res = callbr i8* asm "", "=r,r,!i"(i8* %x)
to label %asm.fallthrough [label %foo]
The benefit of this is that we can easily update the successors of
a callbr, without having to worry about also updating blockaddress
references. This should allow us to remove some limitations:
* Allow unrolling/peeling/rotation of callbr, or any other
clone-based optimizations
(https://github.com/llvm/llvm-project/issues/41834)
* Allow duplicate successors
(https://github.com/llvm/llvm-project/issues/45248)
This is just the IR representation change though, I will follow up
with patches to remove limtations in various transformation passes
that are no longer needed.
Differential Revision: https://reviews.llvm.org/D129288
84 lines
1.9 KiB
LLVM
84 lines
1.9 KiB
LLVM
; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s
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define i32 @f1(i32 %x) {
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%y = add i32 %z, 1
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%z = add i32 %x, 1
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ret i32 %y
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; CHECK: Instruction does not dominate all uses!
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; CHECK-NEXT: %z = add i32 %x, 1
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; CHECK-NEXT: %y = add i32 %z, 1
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}
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declare i32 @g()
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define void @f2(i32 %x) personality i32 ()* @g {
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bb0:
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%y1 = invoke i32 @g() to label %bb1 unwind label %bb2
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bb1:
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ret void
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bb2:
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%y2 = phi i32 [%y1, %bb0]
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%y3 = landingpad i32
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cleanup
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ret void
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; CHECK: Instruction does not dominate all uses!
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; CHECK-NEXT: %y1 = invoke i32 @g()
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; CHECK-NEXT: to label %bb1 unwind label %bb2
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; CHECK-NEXT: %y2 = phi i32 [ %y1, %bb0 ]
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}
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define void @f3(i32 %x) personality i32 ()* @g {
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bb0:
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%y1 = invoke i32 @g() to label %bb1 unwind label %bb2
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bb1:
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ret void
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bb2:
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%y2 = landingpad i32
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cleanup
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br label %bb3
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bb3:
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%y3 = phi i32 [%y1, %bb2]
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ret void
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; CHECK: Instruction does not dominate all uses!
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; CHECK-NEXT: %y1 = invoke i32 @g()
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; CHECK-NEXT: to label %bb1 unwind label %bb2
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; CHECK-NEXT: %y3 = phi i32 [ %y1, %bb2 ]
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}
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define void @f4(i32 %x) {
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bb0:
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br label %bb1
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bb1:
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%y3 = phi i32 [%y1, %bb0]
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%y1 = add i32 %x, 1
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ret void
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; CHECK: Instruction does not dominate all uses!
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; CHECK-NEXT: %y1 = add i32 %x, 1
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; CHECK-NEXT: %y3 = phi i32 [ %y1, %bb0 ]
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}
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define void @f5() {
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entry:
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br label %next
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next:
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%y = phi i32 [ 0, %entry ]
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%x = phi i32 [ %y, %entry ]
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ret void
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; CHECK: Instruction does not dominate all uses!
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; CHECK-NEXT: %y = phi i32 [ 0, %entry ]
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; CHECK-NEXT: %x = phi i32 [ %y, %entry ]
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}
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define i32 @f6(i32 %x) {
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bb0:
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%y1 = callbr i32 asm "", "=r,!i"() to label %bb1 [label %bb2]
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bb1:
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ret i32 0
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bb2:
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ret i32 %y1
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; CHECK: Instruction does not dominate all uses!
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; CHECK-NEXT: %y1 = callbr i32 asm "", "=r,!i"()
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; CHECK-NEXT: to label %bb1 [label %bb2]
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; CHECK-NEXT: ret i32 %y1
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}
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