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llvm-project/llvm/lib/Target/AArch64
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Paul Walker b0b97e3b05
[LLVM][AArch64] Refactor lowering of fixed length integer setcc operations. (#132434) 
The original code is essentially performing isel during legalisation
with the AArch64 specific nodes offering no additional value compared to
ISD::SETCC.
2025-04-04 12:13:45 +01:00
..
AsmParser
MCValue: Simplify code with getSubSym
2025-03-29 18:19:19 -07:00
Disassembler
[MC] Return MCRegister from MCRegisterClass::getRegister. NFC (#132126)
2025-03-20 07:24:53 -07:00
GISel
[Target] Use llvm::append_range (NFC) (#133606)
2025-03-29 18:47:47 -07:00
MCTargetDesc
[AArch64] Bugfix when using execute-only and memtag sanitizer together (#133084)
2025-04-01 09:35:27 +02:00
TargetInfo
…
Utils
[AArch64][SME2] Don't preserve ZT0 around SME ABI routines (#132722)
2025-03-25 10:09:25 +00:00
AArch64.h
[MTE] Apply alignment / size in AsmPrinter rather than IR (#111918)
2024-12-17 00:47:02 -08:00
AArch64.td
[NFC][AArch64] Adjust predicate names to be more consistent (#123172)
2025-01-16 19:36:28 +00:00
AArch64A53Fix835769.cpp
[AArch64] Remove unused includes (NFC) (#115685)
2024-11-11 07:35:08 -08:00
AArch64A57FPLoadBalancing.cpp
[EquivalenceClasses] Use SmallVector for deterministic iteration order. (#134075)
2025-04-02 20:27:43 +01:00
AArch64AdvSIMDScalarPass.cpp
Revert "[CodeGen] Remove static member function Register::isVirtualRegister. NFC (#127968)"
2025-02-20 22:06:21 +00:00
AArch64Arm64ECCallLowering.cpp
[ARM64EC] Add support for function aliases on ARM64EC (#132295)
2025-03-31 12:56:09 +02:00
AArch64AsmPrinter.cpp
[ARM64EC] Add support for function aliases on ARM64EC (#132295)
2025-03-31 12:56:09 +02:00
AArch64BranchTargets.cpp
[Target] Use *Set::insert_range (NFC) (#132879)
2025-03-24 22:42:04 -07:00
AArch64CallingConvention.cpp
[AArch64] Do not split bfloat HFA args between regs and stack (#128909)
2025-02-27 11:38:41 +00:00
AArch64CallingConvention.h
…
AArch64CallingConvention.td
[AArch64] Basic SVE PCS support for handling scalable vectors on Darwin.
2024-08-20 17:10:51 -07:00
AArch64CleanupLocalDynamicTLSPass.cpp
[aarch64][win] Update Called Globals info when updating Call Site info (#122762)
2025-01-13 14:00:31 -08:00
AArch64CollectLOH.cpp
[CodeGen] Use MCRegister instead of MCPhysReg in RegisterMaskPair. NFC (#123688)
2025-01-21 07:04:35 -08:00
AArch64Combine.td
[GlobalISel][NFC] Rename GISelKnownBits to GISelValueTracking (#133466)
2025-03-29 11:51:29 +01:00
AArch64CompressJumpTables.cpp
[AArch64] Remove unused includes (NFC) (#115685)
2024-11-11 07:35:08 -08:00
AArch64CondBrTuning.cpp
[InstrRef] Preserve debug instr num in aarch64-cond-br-tuning. (#132081)
2025-03-20 23:06:10 -07:00
AArch64ConditionalCompares.cpp
Revert "[CodeGen] Remove static member function Register::isVirtualRegister. NFC (#127968)"
2025-02-20 22:06:21 +00:00
AArch64ConditionOptimizer.cpp
…
AArch64DeadRegisterDefinitionsPass.cpp
[AArch64] Remove unused includes (NFC) (#115685)
2024-11-11 07:35:08 -08:00
AArch64ExpandImm.cpp
…
AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
[InstrRef] Preserve debug instr num in aarch64-expand-pseudo LOADgot expansion (#128081)
2025-02-24 21:42:02 -08:00
AArch64FalkorHWPFFix.cpp
…
AArch64FastISel.cpp
[AArch64] Avoid repeated hash lookups (NFC) (#130542)
2025-03-09 23:15:22 -07:00
AArch64Features.td
[AArch64] Add support for SHF_AARCH64_PURECODE ELF section flag (1/3) (#125687)
2025-02-14 08:56:07 +00:00
AArch64FMV.td
[FMV][AArch64] Add feature CSSC and detect on linux platform. (#132727)
2025-03-26 08:40:29 +00:00
AArch64FrameLowering.cpp
[AArch64] Use llvm::erase_if (NFC) (#133647)
2025-03-30 12:21:03 -07:00
AArch64FrameLowering.h
[CFIFixup] Fixup CFI for split functions with synchronous uwtables (#125299)
2025-02-11 18:25:08 -05:00
AArch64GenRegisterBankInfo.def
[GlobalISel][AArch64] Legalize G_ADD, G_SUB, G_AND, G_OR, and G_XOR for SVE (#110561)
2024-10-27 23:14:07 +01:00
AArch64InstrAtomics.td
[AArch64] Codegen for 16/32/64-bit floating-point atomicrmw ops (#125686)
2025-03-07 11:22:33 +00:00
AArch64InstrFormats.td
[LLVM][AArch64] Refactor lowering of fixed length integer setcc operations. (#132434)
2025-04-04 12:13:45 +01:00
AArch64InstrGISel.td
…
AArch64InstrInfo.cpp
[Machine-Combiner] Add a pass to reassociate chains of accumulation instructions into a tree (#132728)
2025-03-25 15:58:20 +02:00
AArch64InstrInfo.h
[Machine-Combiner] Add a pass to reassociate chains of accumulation instructions into a tree (#132728)
2025-03-25 15:58:20 +02:00
AArch64InstrInfo.td
[LLVM][AArch64] Refactor lowering of fixed length integer setcc operations. (#132434)
2025-04-04 12:13:45 +01:00
AArch64ISelDAGToDAG.cpp
[AArch64] Use ArrayRef::slice (NFC) (#133862)
2025-04-01 07:28:18 -07:00
AArch64ISelLowering.cpp
[LLVM][AArch64] Refactor lowering of fixed length integer setcc operations. (#132434)
2025-04-04 12:13:45 +01:00
AArch64ISelLowering.h
[LLVM][AArch64] Refactor lowering of fixed length integer setcc operations. (#132434)
2025-04-04 12:13:45 +01:00
AArch64LoadStoreOptimizer.cpp
[AArch64] Fix LDR/STR folding causing memtag failures (#118821)
2024-12-06 13:07:37 +00:00
AArch64LowerHomogeneousPrologEpilog.cpp
[NFC]Make file-local cl::opt global variables static (#126486)
2025-03-03 13:46:33 +07:00
AArch64MachineFunctionInfo.cpp
[IR] Store Triple in Module (NFC) (#129868)
2025-03-06 10:27:47 +01:00
AArch64MachineFunctionInfo.h
[Target] Use *Set::insert_range (NFC) (#132140)
2025-03-20 09:09:30 -07:00
AArch64MachineScheduler.cpp
…
AArch64MachineScheduler.h
…
AArch64MacroFusion.cpp
…
AArch64MacroFusion.h
[CodeGen] Move MISched target hooks into TargetMachine (#125700)
2025-02-05 11:41:37 +05:30
AArch64MCInstLower.cpp
[AArch64] Rename VariantKind to Specifier
2025-03-26 09:01:20 -07:00
AArch64MCInstLower.h
…
AArch64MIPeepholeOpt.cpp
Fix typo "intead"
2024-11-21 14:48:38 +00:00
AArch64PBQPRegAlloc.cpp
Revert "[CodeGen] Remove static member function Register::isPhysicalRegister. NFC"
2025-02-20 22:06:21 +00:00
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
…
AArch64PfmCounters.td
[Exegesis][AArch64] Use more generic cycles counter (#133376)
2025-03-30 16:59:53 -07:00
AArch64PointerAuth.cpp
[AArch64] Correct position of CFI Instruction for Pointer Authentication (#121559)
2025-01-06 09:39:50 +00:00
AArch64PointerAuth.h
[AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (#110705)
2024-11-12 18:27:19 +03:00
AArch64PostCoalescerPass.cpp
[AArch64] Remove unused includes (NFC) (#115685)
2024-11-11 07:35:08 -08:00
AArch64Processors.td
[AArch64] Add FEAT_FPAC to Neoverse V2 (#133054)
2025-03-26 15:21:21 +00:00
AArch64PromoteConstant.cpp
[AArch64] Remove unused includes (NFC) (#115685)
2024-11-11 07:35:08 -08:00
AArch64RedundantCopyElimination.cpp
…
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
[FrameLowering] Use MCRegister instead of Register in CalleeSavedInfo. NFC (#128095)
2025-02-20 23:44:05 -08:00
AArch64RegisterInfo.h
[FrameLowering] Use MCRegister instead of Register in CalleeSavedInfo. NFC (#128095)
2025-02-20 23:44:05 -08:00
AArch64RegisterInfo.td
[AArch64][SME] Spill p-regs as z-regs when streaming hazards are possible (#123752)
2025-02-03 12:04:46 +00:00
AArch64SchedA53.td
…
AArch64SchedA55.td
…
AArch64SchedA57.td
…
AArch64SchedA57WriteRes.td
…
AArch64SchedA64FX.td
…
AArch64SchedA510.td
…
AArch64SchedAmpere1.td
…
AArch64SchedAmpere1B.td
…
AArch64SchedCyclone.td
…
AArch64SchedExynosM3.td
…
AArch64SchedExynosM4.td
…
AArch64SchedExynosM5.td
…
AArch64SchedFalkor.td
…
AArch64SchedFalkorDetails.td
…
AArch64SchedKryo.td
…
AArch64SchedKryoDetails.td
…
AArch64SchedNeoverseN1.td
…
AArch64SchedNeoverseN2.td
[AArch64][machine-scheduler][Neoverse-N2] fdiv is blocking (#119206)
2025-01-06 21:57:15 +00:00
AArch64SchedNeoverseN3.td
[AArch64] Initial sched model for Neoverse N3 (#106371)
2024-09-19 19:22:24 +01:00
AArch64SchedNeoverseV1.td
[AArch64] Fix scheduling information for arithmetic and logical instructions. (#113542)
2024-12-04 09:30:44 +00:00
AArch64SchedNeoverseV2.td
[AArch64] Fix scheduling information for arithmetic and logical instructions. (#113542)
2024-12-04 09:30:44 +00:00
AArch64SchedOryon.td
…
AArch64SchedPredExynos.td
…
AArch64SchedPredicates.td
…
AArch64SchedPredNeoverse.td
…
AArch64SchedThunderX2T99.td
…
AArch64SchedThunderX3T110.td
…
AArch64SchedThunderX.td
…
AArch64SchedTSV110.td
…
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
[SelectionDAG] Virtualize isTargetStrictFPOpcode / isTargetMemoryOpcode (#119969)
2024-12-21 05:29:51 +03:00
AArch64SelectionDAGInfo.h
[SelectionDAG] Virtualize isTargetStrictFPOpcode / isTargetMemoryOpcode (#119969)
2024-12-21 05:29:51 +03:00
AArch64SIMDInstrOpt.cpp
…
AArch64SLSHardening.cpp
[aarch64][win] Update Called Globals info when updating Call Site info (#122762)
2025-01-13 14:00:31 -08:00
AArch64SMEInstrInfo.td
[Clang][LLVM] Implement single-single vectors MOP4{A/S} (#127797)
2025-04-01 13:35:09 +01:00
AArch64SpeculationHardening.cpp
[AArch64] Remove unused includes (NFC) (#115685)
2024-11-11 07:35:08 -08:00
AArch64StackTagging.cpp
[IR] Store Triple in Module (NFC) (#129868)
2025-03-06 10:27:47 +01:00
AArch64StackTaggingPreRA.cpp
[NFC]Make file-local cl::opt global variables static (#126486)
2025-03-03 13:46:33 +07:00
AArch64StorePairSuppress.cpp
[CodeGen][NewPM] Port machine trace metrics analysis to new pass manager. (#108507)
2024-10-16 13:19:55 +05:30
AArch64Subtarget.cpp
[AArch64] Add initial support for -mcpu=olympus. (#132368)
2025-03-25 08:09:04 +00:00
AArch64Subtarget.h
Reapply "[AArch64][SVE] Improve fixed-length addressing modes. (#129732)" (#130625)
2025-03-19 08:25:37 +00:00
AArch64SVEInstrInfo.td
[AArch64] Use tablegen HasOneUse. NFC
2025-04-01 18:37:10 +01:00
AArch64SystemOperands.td
[AArch64] Add DC CIGDPAPA and DC CIPAPA instructions (#122718)
2025-01-14 08:35:36 +00:00
AArch64TargetMachine.cpp
Initialize aarch64-cond-br-tuning pass (#132087)
2025-03-20 14:48:53 -07:00
AArch64TargetMachine.h
Revert "Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128…" (#128819)
2025-02-26 10:54:39 +05:30
AArch64TargetObjectFile.cpp
[AArch64] Always add PURECODE flag to empty .text if "+execute-only" is set (#132196)
2025-03-24 11:19:26 +01:00
AArch64TargetObjectFile.h
[CodeGen] Rename PLTRelativeVariantKind. NFC
2025-03-21 23:02:08 -07:00
AArch64TargetTransformInfo.cpp
[AArch64] Use getVectorInstrCost in div cost
2025-04-02 14:51:22 +01:00
AArch64TargetTransformInfo.h
[TTI] Make isLegalMasked{Load,Store} take an address space (#134006)
2025-04-02 15:38:10 -05:00
CMakeLists.txt
Revert "Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128…" (#128819)
2025-02-26 10:54:39 +05:30
SMEABIPass.cpp
[AArch64] Remove unused includes (NFC) (#115685)
2024-11-11 07:35:08 -08:00
SMEInstrFormats.td
[Clang][LLVM] Implement multi-multi vectors MOP4{A/S} (#129230)
2025-04-01 19:20:27 +01:00
SMEPeepholeOpt.cpp
[AArch64][SME] Extend FORM_TRANSPOSED pseudos to all multi-vector intrinsics (#124258)
2025-02-04 16:28:06 +00:00
SVEInstrFormats.td
[LLVM][AArch64][SVE] Mark DUP immediate instructions with isAsCheapAsAMove. (#133945)
2025-04-03 11:42:07 +01:00
SVEIntrinsicOpts.cpp
[AArch64] Remove unused includes (NFC) (#115685)
2024-11-11 07:35:08 -08:00