llvm-project/llvm/test/MC/RISCV/xtheadsync-valid.s
Manolis Tsamis 16a6cf6a99 [RISCV] Add vendor-defined XTheadSync (Multi-core synchronization) extension
The vendor-defined XTheadSync (no comparable standard extension exists
at the time of writing) extension adds multi-core synchronization
instructions.

It is supported by the C9xx cores (e.g., found in the wild in the
Allwinner D1) by Alibaba T-Head.

The current (as of this commit) public documentation for this
extension is available at:
  https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.2.2/xthead-2023-01-30-2.2.2.pdf

Support for these instructions has already landed in GNU Binutils:
  https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=547c18d9bb95571261dbd17f4767194037eb82bd

Depends on D144496

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D144501
2023-02-22 11:15:40 +01:00

31 lines
1.1 KiB
ArmAsm

# RUN: llvm-mc %s -triple=riscv32 -mattr=+xtheadsync -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+xtheadsync < %s \
# RUN: | llvm-objdump --mattr=+xtheadsync -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+xtheadsync -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+xtheadsync < %s \
# RUN: | llvm-objdump --mattr=+xtheadsync -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: th.sfence.vmas a0, a1
# CHECK-ASM: encoding: [0x0b,0x00,0xb5,0x04]
th.sfence.vmas a0, a1
# CHECK-ASM-AND-OBJ: th.sync
# CHECK-ASM: encoding: [0x0b,0x00,0x80,0x01]
th.sync
# CHECK-ASM-AND-OBJ: th.sync.i
# CHECK-ASM: encoding: [0x0b,0x00,0xa0,0x01]
th.sync.i
# CHECK-ASM-AND-OBJ: th.sync.is
# CHECK-ASM: encoding: [0x0b,0x00,0xb0,0x01]
th.sync.is
# CHECK-ASM-AND-OBJ: th.sync.s
# CHECK-ASM: encoding: [0x0b,0x00,0x90,0x01]
th.sync.s