Stanislav Mekhanoshin dddeb07c2e

[AMDGPU] Restrict packed math FP32 instructions to read only one SGPR per operand on gfx12+ (#152465) ...

Sec. 4.6.7.1 of the gfx1250 SPG states that if an SGPR is used
as an operand, only one SGPR will be read for both the low and high
operations. As a result, the corresponding bits in `op_sel` and
`op_sel_hi` must be the same when the operand is an SGPR.

Co-authored-by: Tian, Shilei <Shilei.Tian@amd.com>

Co-authored-by: Tian, Shilei <Shilei.Tian@amd.com>

2025-08-07 16:13:34 -07:00

..

AArch64

[AArch64] Allow splitting bitmasks for EOR/ORR. (#150394)

2025-08-07 10:42:30 +01:00

AMDGPU

[AMDGPU] Restrict packed math FP32 instructions to read only one SGPR per operand on gfx12+ (#152465)

2025-08-07 16:13:34 -07:00

ARC

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ARM

[ARM] Fix inline asm register validation for vector types (#152175)

2025-08-06 10:30:49 +02:00

AVR

[AVR] Fix codegen after getConstant assertions got enabled (#152269)

2025-08-07 11:40:33 +02:00

BPF

[BPF] Visit nested map array during BTF generation (#150608)

2025-07-28 13:45:15 -07:00

CSKY

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DirectX

[DirectX] Overlapping binding detection - check register space first (#152250)

2025-08-07 10:48:47 -07:00

Generic

[win][arm64ec] More fixes for building and testing Arm64EC Windows (#151409)

2025-08-05 14:54:08 -07:00

Hexagon

[Hexagon] Add nounwind to hexagon-strcpy.ll (#151293)

2025-07-31 11:13:55 +05:30

Inputs

CodeGen: Convert test to opaque pointers (#147886)

2025-07-10 17:01:19 +09:00

Lanai

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LoongArch

[LoongArch] Optimize extracting f32/f64 from 256-bit vector by using XVPICKVE. (#151914)

2025-08-06 09:11:34 +08:00

M68k

[GISel] Introduce MIFlags::InBounds (#150900)

2025-07-30 13:01:23 +02:00

Mips

[llvm] Extract and propagate callee_type metadata

2025-07-30 14:56:39 -07:00

MIR

[llvm] Extract and propagate callee_type metadata

2025-07-30 14:56:39 -07:00

MLRegAlloc

[mlgo] Fix test post - #147716 (#148259)

2025-07-12 12:24:01 +02:00

MSP430

MSP430: Add test for llvm.exp10 intrinsic (#148605)

2025-07-25 09:01:17 +09:00

NVPTX

[NVPTX][Test-only] Add proper sm-version to ptxas-verify in prefetch-inferas-test.ll (#152492)

2025-08-07 22:42:00 +05:30

PowerPC

[PowerPC][AIX] Using milicode for memcmp instead of libcall (#147093)

2025-08-07 13:13:56 -04:00

RISCV

[DAG] canCreateUndefOrPoison - add FP_EXTEND (#152249)

2025-08-07 09:23:46 +01:00

SPARC

[Sparc] Remove bogus stack adjustment for LD/GD TLS (#149890)

2025-07-22 16:44:18 +01:00

SPIRV

[SPIRV] Add pass to replace gethandlefromimplicitbinding (#146756)

2025-08-06 13:10:55 -04:00

SystemZ

[RegisterCoalescer] Fix subrange update when rematerialization widens a def (#151974)

2025-08-05 22:32:31 +09:00

Thumb

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Thumb2

[IR] Only allow lifetime.start/end on allocas (#149310)

2025-07-21 15:04:50 +02:00

VE

[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)

2025-08-05 09:24:09 +01:00

WebAssembly

[clang][WebAssembly] Support reftypes & varargs in test_function_pointer_signature (#150921)

2025-08-07 13:07:04 -07:00

WinCFGuard

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WinEH

Fix Windows EH IP2State tables (remove +1 bias) (#144745)

2025-07-22 09:18:13 -07:00

X86

[DAG] getNode - fold (sext (trunc x)) -> x iff the upper bits are already signbits (#151945)

2025-08-06 14:55:46 +01:00

XCore

XCore: Fix broken check lines in test

2025-08-04 08:40:48 +09:00

Xtensa

[Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (#137134)

2025-08-06 17:43:27 +03:00