shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/llvm/lib/Target/AArch64
History
Malay Sanghi 92e96c7bba
[X86][GISel] Add DU chain lookups for LOAD & STORE (#87453) 
For G_LOAD and G_STORE we want this information during regbankselect.
Today we treat load dest as integer and insert converts.

---------

Co-authored-by: Evgenii Kudriashov <evgenii.kudriashov@intel.com>
2024-04-16 13:06:17 +02:00
..
AsmParser
[AArch64] Remove copy in SVE/SME predicate spill and fill (#81716)
2024-04-09 16:17:27 +01:00
Disassembler
[AArch64] Remove copy in SVE/SME predicate spill and fill (#81716)
2024-04-09 16:17:27 +01:00
GISel
[X86][GISel] Add DU chain lookups for LOAD & STORE (#87453)
2024-04-16 13:06:17 +02:00
MCTargetDesc
[AArch64][PAC][MC][ELF] Support PAuth ABI compatibility tag (#85236)
2024-04-04 21:05:03 +03:00
TargetInfo
…
Utils
[AArch64][SME] Allow memory operations lowering to custom SME functions. (#79263)
2024-04-09 17:27:46 +01:00
AArch64.h
[AArch64][SME] Create new pass to remove COALESCER_BARRIER early. (#85386)
2024-04-15 15:07:20 +01:00
AArch64.td
Revert "[AArch64] Add support for -ffixed-x30" (#88019)
2024-04-08 15:16:00 -07:00
AArch64A53Fix835769.cpp
…
AArch64A57FPLoadBalancing.cpp
[llvm] Stop including llvm/ADT/BitVector.h (NFC)
2023-11-11 13:24:01 -08:00
AArch64AdvSIMDScalarPass.cpp
…
AArch64Arm64ECCallLowering.cpp
[IR][Object][NFC] Move ARM64EC name mangling helpers to Mangler.h. (#87191)
2024-03-31 17:39:58 +02:00
AArch64AsmPrinter.cpp
[AArch64][PAC][MC][ELF] Support PAuth ABI compatibility tag (#85236)
2024-04-04 21:05:03 +03:00
AArch64BranchTargets.cpp
…
AArch64CallingConvention.cpp
…
AArch64CallingConvention.h
Arm64EC entry/exit thunks, consolidated. (#79067)
2024-01-22 21:28:07 -08:00
AArch64CallingConvention.td
[AArch64] Skip over shadow space for ARM64EC entry thunk variadic calls (#80994)
2024-02-27 10:32:15 -08:00
AArch64CleanupLocalDynamicTLSPass.cpp
…
AArch64CollectLOH.cpp
[Target] Remove unnecessary includes (NFC)
2023-12-07 21:03:56 -08:00
AArch64Combine.td
[AArch64][GlobalISel] Legalize Insert vector element (#81453)
2024-04-08 08:44:13 +01:00
AArch64CompressJumpTables.cpp
…
AArch64CondBrTuning.cpp
…
AArch64ConditionalCompares.cpp
[llvm] Stop including llvm/ADT/SmallPtrSet.h (NFC)
2023-11-11 00:35:14 -08:00
AArch64ConditionOptimizer.cpp
…
AArch64DeadRegisterDefinitionsPass.cpp
…
AArch64ExpandImm.cpp
[Aarch64] Materialize immediates with 64-bit ORR + EOR if shorter (#68287)
2023-10-10 08:05:51 +01:00
AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
[AArch64] NFC: Simplify the smstart/smstop pseudo. (#85067)
2024-03-15 08:50:58 +00:00
AArch64FalkorHWPFFix.cpp
[Target] Remove unnecessary includes (NFC)
2023-12-07 21:03:56 -08:00
AArch64FastISel.cpp
[AArch64] Fix fptoi/itofp for bf16
2024-03-06 06:17:39 +00:00
AArch64FrameLowering.cpp
[NFC] Refactor looping over recomputeLiveIns into function (#88040)
2024-04-15 17:12:25 -04:00
AArch64FrameLowering.h
[AArch64] Stack probing for function prologues (#66524)
2023-11-30 17:41:51 +00:00
AArch64GenRegisterBankInfo.def
[GISel] Make target's PartMapping, ValueMapping, and BankIDToCopyMapIdx arrays const. (#71079)
2023-11-09 17:03:56 -08:00
AArch64GlobalsTagging.cpp
[MTE] Disable all MTE protection of globals in sections (#78443)
2024-01-22 11:55:39 +01:00
AArch64InstrAtomics.td
[AArch64][GlobalISel] Legalize Insert vector element (#81453)
2024-04-08 08:44:13 +01:00
AArch64InstrFormats.td
[AArch64][GlobalISel] Legalize Insert vector element (#81453)
2024-04-08 08:44:13 +01:00
AArch64InstrGISel.td
[GlobalISel][AArch64] Combine Vector Reduction Add Long (#76241)
2024-01-22 10:05:37 +00:00
AArch64InstrInfo.cpp
[NFC] Refactor looping over recomputeLiveIns into function (#88040)
2024-04-15 17:12:25 -04:00
AArch64InstrInfo.h
[MachineCombiner][NFC] Split target-dependent patterns
2024-04-11 12:20:27 +08:00
AArch64InstrInfo.td
[AArch64][GlobalISel] Legalize Insert vector element (#81453)
2024-04-08 08:44:13 +01:00
AArch64ISelDAGToDAG.cpp
[LLVM][SVE][CodeGen] Fix incorrect isel for signed saturating instructions. (#88136)
2024-04-15 12:24:42 +01:00
AArch64ISelLowering.cpp
[InterleavedAccessPass] Get round the unsupported large scalarize vectors (#88643)
2024-04-16 09:00:03 +08:00
AArch64ISelLowering.h
[LLVM][SelectionDAG] Allow verification of target ISD nodes. (#88121)
2024-04-15 13:50:09 +01:00
AArch64LoadStoreOptimizer.cpp
[CodeGen] Use LocationSize for MMO getSize (#84751)
2024-03-17 18:15:56 +00:00
AArch64LoopIdiomTransform.cpp
[AArch64][LoopIdiom] Disable LoopIdiomTransform when NoImplicitFloat is present (#87677)
2024-04-08 09:10:23 -07:00
AArch64LoopIdiomTransform.h
[AArch64] Add an AArch64 pass for loop idiom transformations (#72273)
2024-01-09 11:29:28 +00:00
AArch64LowerHomogeneousPrologEpilog.cpp
[CodeGen] Do not pass MF into MachineRegisterInfo methods. NFC. (#84770)
2024-03-11 15:35:05 +00:00
AArch64MachineFunctionInfo.cpp
Re-land "[AArch64] Codegen support for FEAT_PAuthLR" (#75947)
2023-12-21 18:32:55 +00:00
AArch64MachineFunctionInfo.h
[AArch64][SME] Conditionally do smstart/smstop (#77113)
2024-01-18 09:17:23 +00:00
AArch64MachineScheduler.cpp
…
AArch64MachineScheduler.h
…
AArch64MacroFusion.cpp
…
AArch64MacroFusion.h
…
AArch64MCInstLower.cpp
[llvm-lib][Object] Add support for EC importlib symbols. (#81059)
2024-02-10 12:46:42 +01:00
AArch64MCInstLower.h
Arm64EC entry/exit thunks, consolidated. (#79067)
2024-01-22 21:28:07 -08:00
AArch64MIPeepholeOpt.cpp
[AArch64] Clear kill flags when removing FMOVDr. (#86308)
2024-03-27 18:36:02 +00:00
AArch64PassRegistry.def
[NewPM][AArch64] Add AArch64PassRegistry.def (#85215)
2024-03-21 10:57:51 +08:00
AArch64PBQPRegAlloc.cpp
…
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
[AArch64] Add ZIP and UZP shuffle costs. (#88150)
2024-04-11 08:45:28 +01:00
AArch64PfmCounters.td
…
AArch64PointerAuth.cpp
[AArch64][PAC] Refine authenticated pointer check methods (#74074)
2024-02-05 13:53:26 +03:00
AArch64PointerAuth.h
[AArch64][PAC] Check authenticated LR value during tail call
2023-10-11 17:38:17 +03:00
AArch64PostCoalescerPass.cpp
[AArch64][SME] Create new pass to remove COALESCER_BARRIER early. (#85386)
2024-04-15 15:07:20 +01:00
AArch64PromoteConstant.cpp
…
AArch64RedundantCopyElimination.cpp
[AArch64] Fix debug printing crash in AArch64RedundantCopyElimination
2023-08-23 11:49:36 +01:00
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
[MachineLICM] Give opportunity to analyze physregs for invariance. (#84779)
2024-03-15 09:30:46 +00:00
AArch64RegisterInfo.h
[MachineLICM] Give opportunity to analyze physregs for invariance. (#84779)
2024-03-15 09:30:46 +00:00
AArch64RegisterInfo.td
[AArch64] Remove copy in SVE/SME predicate spill and fill (#81716)
2024-04-09 16:17:27 +01:00
AArch64SchedA53.td
[AArch64] Initial Ampere1B scheduling model (#81341)
2024-02-14 15:23:14 +01:00
AArch64SchedA55.td
[AArch64] Fix postinc operands for Cortex-A55 scheduling
2023-10-10 12:56:33 +01:00
AArch64SchedA57.td
[AArch64] Initial Ampere1B scheduling model (#81341)
2024-02-14 15:23:14 +01:00
AArch64SchedA57WriteRes.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedA64FX.td
[AArch64] Initial Ampere1B scheduling model (#81341)
2024-02-14 15:23:14 +01:00
AArch64SchedA510.td
[LLVM][AArch64][CodeGen] Mark FFR as a reserved register. (#83437)
2024-03-05 12:34:15 +00:00
AArch64SchedAmpere1.td
[AArch64] Adjust ROBsize for Ampere1/Ampere1A (NFC) (#86330)
2024-03-22 16:29:58 -07:00
AArch64SchedAmpere1B.td
[AArch64] Adjust ROBsize for Ampere1B (NFC) (#86331)
2024-03-22 16:30:12 -07:00
AArch64SchedCyclone.td
[AArch64] Initial Ampere1B scheduling model (#81341)
2024-02-14 15:23:14 +01:00
AArch64SchedExynosM3.td
[AArch64] Initial Ampere1B scheduling model (#81341)
2024-02-14 15:23:14 +01:00
AArch64SchedExynosM4.td
[CodeGenSchedule] Don't allow invalid ReadAdvances to be formed (#82685)
2024-02-26 18:25:21 -08:00
AArch64SchedExynosM5.td
[CodeGenSchedule] Don't allow invalid ReadAdvances to be formed (#82685)
2024-02-26 18:25:21 -08:00
AArch64SchedFalkor.td
[AArch64] Initial Ampere1B scheduling model (#81341)
2024-02-14 15:23:14 +01:00
AArch64SchedFalkorDetails.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedKryo.td
[AArch64] Initial Ampere1B scheduling model (#81341)
2024-02-14 15:23:14 +01:00
AArch64SchedKryoDetails.td
…
AArch64SchedNeoverseN1.td
[AArch64] Initial Ampere1B scheduling model (#81341)
2024-02-14 15:23:14 +01:00
AArch64SchedNeoverseN2.td
[AArch64] Ensure Neoverse-N2 scheduling model includes all SVE pseudos.
2024-03-08 09:52:49 +00:00
AArch64SchedNeoverseV1.td
[AArch64] Correct Neoverse V1 SVE 16-bit sdot/udot schedule pipelines. (#86142)
2024-03-25 11:20:56 +00:00
AArch64SchedNeoverseV2.td
[AArch64] Fix to Neoverse V2 scheduling model (#88130)
2024-04-11 09:32:17 +01:00
AArch64SchedPredExynos.td
[AArch64] Refactor predicate to check for a ZR operand (NFC)
2023-07-07 19:19:24 -05:00
AArch64SchedPredicates.td
[AArch64] Refactor predicate to check for a ZR operand (NFC)
2023-07-07 19:19:24 -05:00
AArch64SchedPredNeoverse.td
[AArch64] Fix schedmodel zero latency moves for Neoverse V2
2023-09-07 10:54:38 +01:00
AArch64SchedThunderX2T99.td
[AArch64] Initial Ampere1B scheduling model (#81341)
2024-02-14 15:23:14 +01:00
AArch64SchedThunderX3T110.td
[AArch64] Initial Ampere1B scheduling model (#81341)
2024-02-14 15:23:14 +01:00
AArch64SchedThunderX.td
[AArch64] Initial Ampere1B scheduling model (#81341)
2024-02-14 15:23:14 +01:00
AArch64SchedTSV110.td
[AArch64] Fix sched model for TSV110 core. (#82343)
2024-02-22 13:01:37 +03:00
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
[AArch64][SME] Allow memory operations lowering to custom SME functions. (#79263)
2024-04-09 17:27:46 +01:00
AArch64SelectionDAGInfo.h
[AArch64][SME] Allow memory operations lowering to custom SME functions. (#79263)
2024-04-09 17:27:46 +01:00
AArch64SIMDInstrOpt.cpp
[CodeGen] Make some includes explicit (NFC)
2023-11-24 14:43:18 +01:00
AArch64SLSHardening.cpp
[AArch64] Move SLS later in pass pipeline (#84210)
2024-03-07 09:28:49 +00:00
AArch64SMEInstrInfo.td
[AArch64][SME] Add coalescer barrier for args/results in locally streaming functions. (#85388)
2024-03-26 11:40:31 +00:00
AArch64SpeculationHardening.cpp
[RegScavenger] Simplify state tracking for backwards scavenging (#71202)
2023-11-08 09:49:07 +00:00
AArch64StackTagging.cpp
[RemoveDIs][NFC] Rename DPValue -> DbgVariableRecord (#85216)
2024-03-19 20:07:07 +00:00
AArch64StackTaggingPreRA.cpp
[llvm] Stop including llvm/ADT/DepthFirstIterator.h (NFC)
2023-10-22 12:15:46 -07:00
AArch64StorePairSuppress.cpp
[AArch64] Fix resource length computation for STP. (#81749)
2024-02-16 16:10:10 +00:00
AArch64Subtarget.cpp
[AArch64] Improve scheduling latency into Bundles (#86310)
2024-04-12 10:57:01 +01:00
AArch64Subtarget.h
[AArch64] Improve scheduling latency into Bundles (#86310)
2024-04-12 10:57:01 +01:00
AArch64SVEInstrInfo.td
[LLVM][SVE][CodeGen] Fix incorrect isel for signed saturating instructions. (#88136)
2024-04-15 12:24:42 +01:00
AArch64SystemOperands.td
[AArch64] Disable FP loads/stores when fp-armv8 not enabled (#77817)
2024-01-12 09:15:11 +00:00
AArch64TargetMachine.cpp
[AArch64][SME] Create new pass to remove COALESCER_BARRIER early. (#85386)
2024-04-15 15:07:20 +01:00
AArch64TargetMachine.h
[AArch64] Add an AArch64 pass for loop idiom transformations (#72273)
2024-01-09 11:29:28 +00:00
AArch64TargetObjectFile.cpp
[llvm] Indirect symbol replacement with GOTPCREL for aarch64 and risc… (#78003)
2024-01-16 15:32:35 -08:00
AArch64TargetObjectFile.h
[llvm] Indirect symbol replacement with GOTPCREL for aarch64 and risc… (#78003)
2024-01-16 15:32:35 -08:00
AArch64TargetTransformInfo.cpp
[AArch64] Improve cost of non-zero lane splats
2024-04-14 12:09:14 +01:00
AArch64TargetTransformInfo.h
[AArch64] Add costs for ST3 and ST4 instructions, modelled as store(shuffle). (#87934)
2024-04-09 16:36:08 +01:00
CMakeLists.txt
[AArch64][SME] Create new pass to remove COALESCER_BARRIER early. (#85386)
2024-04-15 15:07:20 +01:00
SMEABIPass.cpp
[AArch64] Replace LLVM IR function attributes for PSTATE.ZA. (#79166)
2024-02-01 13:37:37 +00:00
SMEInstrFormats.td
[AArch64] Remove copy in SVE/SME predicate spill and fill (#81716)
2024-04-09 16:17:27 +01:00
SVEInstrFormats.td
[LLVM][SVE][CodeGen] Fix incorrect isel for signed saturating instructions. (#88136)
2024-04-15 12:24:42 +01:00
SVEIntrinsicOpts.cpp
Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678)
2024-03-10 20:00:13 -07:00